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04277e02d7
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190 lines
4.2 KiB
ArmAsm
190 lines
4.2 KiB
ArmAsm
/* PLT trampolines. PPC32 version.
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Copyright (C) 2005-2019 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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.section ".text"
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.align 2
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.globl _dl_runtime_resolve
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.type _dl_runtime_resolve,@function
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_dl_runtime_resolve:
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cfi_startproc
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# We need to save the registers used to pass parameters, and register 0,
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# which is used by _mcount; the registers are saved in a stack frame.
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stwu r1,-64(r1)
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cfi_adjust_cfa_offset (64)
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stw r0,12(r1)
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stw r3,16(r1)
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stw r4,20(r1)
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# The code that calls this has put parameters for `fixup' in r12 and r11.
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mr r3,r12
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stw r5,24(r1)
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mr r4,r11
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stw r6,28(r1)
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mflr r0
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# We also need to save some of the condition register fields
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stw r7,32(r1)
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# Don't clobber the caller's LRSAVE, it is needed by _mcount.
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stw r0,48(r1)
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cfi_offset (lr, -16)
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stw r8,36(r1)
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mfcr r0
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stw r9,40(r1)
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stw r10,44(r1)
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stw r0,8(r1)
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bl _dl_fixup@local
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# 'fixup' returns the address we want to branch to.
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mtctr r3
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# Put the registers back...
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lwz r0,48(r1)
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lwz r10,44(r1)
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lwz r9,40(r1)
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mtlr r0
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lwz r8,36(r1)
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lwz r0,8(r1)
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lwz r7,32(r1)
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lwz r6,28(r1)
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mtcrf 0xFF,r0
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lwz r5,24(r1)
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lwz r4,20(r1)
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lwz r3,16(r1)
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lwz r0,12(r1)
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# ...unwind the stack frame, and jump to the PLT entry we updated.
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addi r1,r1,64
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bctr
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cfi_endproc
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.size _dl_runtime_resolve,.-_dl_runtime_resolve
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#ifndef PROF
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.align 2
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.globl _dl_prof_resolve
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.type _dl_prof_resolve,@function
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_dl_prof_resolve:
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cfi_startproc
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# We need to save the registers used to pass parameters, and register 0,
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# which is used by _mcount; the registers are saved in a stack frame.
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stwu r1,-320(r1)
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cfi_adjust_cfa_offset (320)
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/* Stack layout:
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+312 stackframe
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+308 lr
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+304 r1
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+288 v12
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+272 v11
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+256 v10
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+240 v9
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+224 v8
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+208 v7
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+192 v6
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+176 v5
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+160 v4
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+144 v3
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+128 v2
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+112 v1
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+104 fp8
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+96 fp7
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+88 fp6
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+80 fp5
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+72 fp4
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+64 fp3
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+56 fp2
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+48 fp1
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+44 r10
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+40 r9
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+36 r8
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+32 r7
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+28 r6
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+24 r5
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+20 r4
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+16 r3
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+12 r0
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+8 cr
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r1 link
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*/
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stw r0,12(r1)
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stw r3,16(r1)
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stw r4,20(r1)
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# The code that calls this has put parameters for `fixup' in r12 and r11.
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mr r3,r12
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stw r5,24(r1)
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mr r4,r11
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stw r6,28(r1)
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mflr r5
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# We also need to save some of the condition register fields.
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stw r7,32(r1)
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# Don't clobber the caller's LRSAVE, it is needed by _mcount.
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stw r5,308(r1)
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cfi_offset (lr, -12)
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stw r8,36(r1)
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mfcr r0
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stw r9,40(r1)
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stw r10,44(r1)
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stw r0,8(r1)
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#ifndef __NO_FPRS__
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# Save the floating point registers
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stfd fp1,48(r1)
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stfd fp2,56(r1)
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stfd fp3,64(r1)
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stfd fp4,72(r1)
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stfd fp5,80(r1)
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stfd fp6,88(r1)
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stfd fp7,96(r1)
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stfd fp8,104(r1)
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#endif
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# XXX TODO: store vmx registers
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# Load the extra parameters.
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addi r6,r1,16
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addi r7,r1,312
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li r0,-1
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stw r0,0(r7)
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bl _dl_profile_fixup@local
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# 'fixup' returns the address we want to branch to.
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mtctr r3
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# Put the registers back...
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lwz r0,308(r1)
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lwz r10,44(r1)
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lwz r9,40(r1)
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mtlr r0
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lwz r8,36(r1)
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lwz r0,8(r1)
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lwz r7,32(r1)
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lwz r6,28(r1)
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mtcrf 0xFF,r0
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lwz r5,24(r1)
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lwz r4,20(r1)
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lwz r3,16(r1)
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lwz r0,12(r1)
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#ifndef __NO_FPRS__
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# Load the floating point registers.
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lfd fp1,48(r1)
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lfd fp2,56(r1)
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lfd fp3,64(r1)
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lfd fp4,72(r1)
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lfd fp5,80(r1)
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lfd fp6,88(r1)
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lfd fp7,96(r1)
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lfd fp8,104(r1)
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#endif
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# ...unwind the stack frame, and jump to the PLT entry we updated.
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addi r1,r1,320
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bctr
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cfi_endproc
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.size _dl_prof_resolve,.-_dl_prof_resolve
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#endif
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