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and then by running 'make dist-prepare' to regenerate files built
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# Omit irrelevant whitespace and comment-only changes,
# perhaps from a slightly-different Autoconf version.
git checkout -f \
sysdeps/csky/configure \
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# Omit changes that caused a pre-commit check to fail like this:
# remote: *** error: sysdeps/powerpc/powerpc64/ppc-mcount.S: trailing lines
git checkout -f \
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git checkout -f sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S
149 lines
6.2 KiB
C
149 lines
6.2 KiB
C
/* FPU control word bits. C-SKY version.
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Copyright (C) 2018-2019 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<https://www.gnu.org/licenses/>. */
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#ifndef _FPU_CONTROL_H
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#define _FPU_CONTROL_H
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/* C-SKY FPU floating point control register bits.
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31-28 -> Reserved (read as 0, write with 0).
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27 -> 0: Flush denormalized results to zero.
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1: Flush denormalized results to signed minimal normal number.
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26 -> Reserved (read as 0, write with 0).
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25-24 -> Rounding control.
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23-6 -> Reserved (read as 0, write with 0).
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5 -> Enable exception for input denormalized exception.
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4 -> Enable exception for inexact exception.
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3 -> Enable exception for underflow exception.
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2 -> Enable exception for overflow exception.
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1 -> Enable exception for division by zero exception.
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0 -> Enable exception for invalid operation exception.
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Rounding Control:
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00 - Rounding to nearest (RN).
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01 - Rounding toward zero (RZ).
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10 - Rounding (up) toward plus infinity (RP).
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11 - Rounding (down)toward minus infinity (RM).
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C-SKY FPU floating point exception status register bits.
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15 -> Accumulate bit for any exception.
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14 -> Reserved (read as 0, write with 0).
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13 -> Cause bit for input denormalized exception.
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12 -> Cause bit for inexact exception.
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11 -> Cause bit for underflow exception.
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10 -> Cause bit for overflow exception.
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9 -> Cause bit for division by zero exception.
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8 -> Cause bit for invalid operation exception.
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7 -> Flag bit for any exception.
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6 -> Reserved (read as 0, write with 0).
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5 -> Flag exception for input denormalized exception.
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4 -> Flag exception for inexact exception.
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3 -> Flag exception for underflow exception.
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2 -> Flag exception for overflow exception.
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1 -> Flag exception for division by zero exception.
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0 -> Flag exception for invalid operation exception. */
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#include <features.h>
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#ifdef __csky_soft_float__
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# define _FPU_RESERVED 0xffffffff
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# define _FPU_DEFAULT 0x00000000
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typedef unsigned int fpu_control_t;
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# define _FPU_GETCW(cw) (cw) = 0
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# define _FPU_SETCW(cw) (void) (cw)
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# define _FPU_GETFPSR(cw) (cw) = 0
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# define _FPU_SETFPSR(cw) (void) (cw)
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extern fpu_control_t __fpu_control;
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#else /* __csky_soft_float__ */
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/* Masking of interrupts. */
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# define _FPU_MASK_IDE (1 << 5) /* Input denormalized exception. */
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# define _FPU_MASK_IXE (1 << 4) /* Inexact exception. */
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# define _FPU_MASK_UFE (1 << 3) /* Underflow exception. */
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# define _FPU_MASK_OFE (1 << 2) /* Overflow exception. */
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# define _FPU_MASK_DZE (1 << 1) /* Division by zero exception. */
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# define _FPU_MASK_IOE (1 << 0) /* Invalid operation exception. */
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# define _FPU_MASK_FEA (1 << 15) /* Case for any exception. */
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# define _FPU_MASK_FEC (1 << 7) /* Flag for any exception. */
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/* Flush denormalized numbers to zero. */
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# define _FPU_FLUSH_TZ 0x8000000
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/* Rounding control. */
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# define _FPU_RC_NEAREST (0x0 << 24) /* RECOMMENDED. */
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# define _FPU_RC_ZERO (0x1 << 24)
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# define _FPU_RC_UP (0x2 << 24)
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# define _FPU_RC_DOWN (0x3 << 24)
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# define _FPU_RESERVED 0xf460ffc0 /* Reserved bits in cw. */
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# define _FPU_FPSR_RESERVED 0xffff4040
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/* The fdlibm code requires strict IEEE double precision arithmetic,
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and no interrupts for exceptions, rounding to nearest. */
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# define _FPU_DEFAULT 0x00000000
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# define _FPU_FPSR_DEFAULT 0x00000000
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/* IEEE: same as above, but exceptions. */
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# define _FPU_FPCR_IEEE 0x0000001F
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# define _FPU_FPSR_IEEE 0x00000000
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/* Type of the control word. */
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typedef unsigned int fpu_control_t;
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/* Macros for accessing the hardware control word. */
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# if (__CSKY__ == 2)
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# define _FPU_GETCW(cw) __asm__ volatile ("mfcr %0, cr<1, 2>" : "=a" (cw))
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# define _FPU_SETCW(cw) __asm__ volatile ("mtcr %0, cr<1, 2>" : : "a" (cw))
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# define _FPU_GETFPSR(cw) __asm__ volatile ("mfcr %0, cr<2, 2>" : "=a" (cw))
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# define _FPU_SETFPSR(cw) __asm__ volatile ("mtcr %0, cr<2, 2>" : : "a" (cw))
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# else
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# define _FPU_GETCW(cw) __asm__ volatile ("1: cprcr %0, cpcr2 \n" \
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" btsti %0, 31 \n" \
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" bt 1b \n" \
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" cprcr %0, cpcr1\n" : "=b" (cw))
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# define _FPU_SETCW(cw) __asm__ volatile ("1: cprcr r7, cpcr2 \n" \
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" btsti r7, 31 \n" \
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" bt 1b \n" \
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" cpwcr %0, cpcr1 \n" \
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: : "b" (cw) : "r7")
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# define _FPU_GETFPSR(cw) __asm__ volatile ("1: cprcr %0, cpcr2 \n" \
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" btsti %0, 31 \n" \
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" bt 1b \n" \
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" cprcr %0, cpcr4\n" : "=b" (cw))
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# define _FPU_SETFPSR(cw) __asm__ volatile ("1: cprcr r7, cpcr2 \n" \
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" btsti r7, 31 \n" \
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" bt 1b \n" \
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" cpwcr %0, cpcr4 \n" \
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: : "b" (cw) : "r7")
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# endif /* __CSKY__ != 2 */
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/* Default control word set at startup. */
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extern fpu_control_t __fpu_control;
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#endif /* !__csky_soft_float__ */
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#endif /* fpu_control.h */
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