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* sysdeps/hppa/fpu/fclrexcpt.c (feclearexcept): Use union to align parameters. Specify memory clobbers. * sysdeps/hppa/fpu/fedisblxcpt.c (fedisableexcept): Likewise. * sysdeps/hppa/fpu/feenablxcpt.c (feenableexcept): Likewise. * sysdeps/hppa/fpu/fegetenv.c (fegetenv): Do not save exception register. Use memcpy to align buffer. * sysdeps/hppa/fpu/fegetexcept.c (fegetexcept): Store and reload fr0. Use union to align parameters. * sysdeps/hppa/fpu/fegetround.c (fegetround): Likewise. * sysdeps/hppa/fpu/feholdexcpt.c (feholdexcept): Do not save exception registers. Define libm_hidden_def. * sysdeps/hppa/fpu/fesetenv.c (fesetenv): Do not save exception registers. * sysdeps/hppa/fpu/fesetround.c (fesetround): Use union to align parameters, speficy memory clobbers. Define libm_hidde_def * sysdeps/hppa/fpu/feupdateenv.c (feupdateenv): Use union to align parameters. Use memcpy to align buffer. * sysdeps/hppa/fpu/fgetexcptflg.c (fegetexceptflag): Likewise. * sysdeps/hppa/fpu/fsetexcptflg.c (fesetexceptflag): Likewise. * sysdeps/hppa/fpu/ftestexcept.c (fetestexcept): Likewise. * sysdeps/hppa/fpu/libm-test-ulps: Update. * sysdeps/hppa/fpu/bits/fenv.h: Add ABI comments.
84 lines
2.9 KiB
C
84 lines
2.9 KiB
C
/* Copyright (C) 2000 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by David Huggins-Daines <dhd@debian.org>
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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#ifndef _FENV_H
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# error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
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#endif
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/* Define bits representing the exception. We use the values of the
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appropriate enable bits in the FPU status word (which,
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coincidentally, are the same as the flag bits, but shifted right by
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27 bits). */
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enum
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{
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FE_INVALID = 1<<4, /* V */
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#define FE_INVALID FE_INVALID
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FE_DIVBYZERO = 1<<3, /* Z */
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#define FE_DIVBYZERO FE_DIVBYZERO
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FE_OVERFLOW = 1<<2, /* O */
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#define FE_OVERFLOW FE_OVERFLOW
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FE_UNDERFLOW = 1<<1, /* U */
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#define FE_UNDERFLOW FE_UNDERFLOW
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FE_INEXACT = 1<<0, /* I */
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#define FE_INEXACT FE_INEXACT
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};
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#define FE_ALL_EXCEPT \
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(FE_INEXACT | FE_DIVBYZERO | FE_UNDERFLOW | FE_OVERFLOW | FE_INVALID)
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/* The PA-RISC FPU supports all of the four defined rounding modes.
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We use the values of the RM field in the floating point status
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register for the appropriate macros. */
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enum
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{
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FE_TONEAREST = 0 << 9,
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#define FE_TONEAREST FE_TONEAREST
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FE_TOWARDZERO = 1 << 9,
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#define FE_TOWARDZERO FE_TOWARDZERO
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FE_UPWARD = 2 << 9,
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#define FE_UPWARD FE_UPWARD
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FE_DOWNWARD = 3 << 9,
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#define FE_DOWNWARD FE_DOWNWARD
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};
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/* Type representing exception flags. */
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typedef unsigned int fexcept_t;
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/* Type representing floating-point environment. This structure
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corresponds to the layout of the status and exception words in the
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register file. The exception registers are never saved/stored by
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userspace. This structure is also not correctly aligned ever, in
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an ABI error we left out __aligned(8) and subsequently all of our
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fenv functions must accept unaligned input, align the input, and
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then use assembly to store fr0. This is a performance hit, but
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means the ABI is stable. */
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typedef struct
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{
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unsigned int __status_word;
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unsigned int __exception[7];
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} fenv_t;
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/* If the default argument is used we use this value. */
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#define FE_DFL_ENV ((fenv_t *) -1)
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#ifdef __USE_GNU
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/* Floating-point environment where none of the exceptions are masked. */
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# define FE_NOMASK_ENV ((fenv_t *) -2)
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#endif
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