glibc/sysdeps/x86_64/fpu/fedisblxcpt.c
Ulrich Drepper a8c79c4088 [BZ #3427]
2007-03-22  Jakub Jelinek  <jakub@redhat.com>
	[BZ #3427]
	* sysdeps/x86_64/fpu/feholdexcpt.c (feholdexcept): Clear all
	exceptions both in SW and MXCSR.
	* sysdeps/x86_64/fpu/feupdateenv.c: New file.
	* sysdeps/x86_64/fpu/feenablxcpt.c (feenableexcept): Remove dead code.
	* sysdeps/x86_64/fpu/fedisblxcpt.c (fedisableexcept): Likewise.
	* sysdeps/i386/fpu/feholdexcpt.c (feholdexcept): Clear all exceptions
	in MXCSR if SSE is available.
	* sysdeps/i386/fpu/feupdateenv.c: Include unistd.h, dl-procinfo.h
	and ldsodefs.h.
	(__feupdateenv): Query exceptions also from MXCSR if SSE is available.
	Fix comment typo.
	* sysdeps/ia64/fpu/feholdexcpt.c (feholdexcept): Clear all exceptions.
	Return 0 rather than 1.
	* sysdeps/ia64/fpu/feupdateenv.c (feupdateenv): Fix comment typo.
	Remove incorrect part of a comment.  Fix argument to feraiseexcept.
	* math/test-fenv.c (feholdexcept_tests): New function.
	(main): Call it.

2007-01-05  Richard B. Kreckel  <kreckel@ginac.de>

	[BZ #3427]
	* sysdeps/i386/fpu/feholdexcpt.c (feholdexcept): Clear all exceptions
	in SW.
2007-04-16 20:15:57 +00:00

48 lines
1.5 KiB
C

/* Disable floating-point exceptions.
Copyright (C) 2001, 2007 Free Software Foundation, Inc.
This file is part of the GNU C Library.
Contributed by Andreas Jaeger <aj@suse.de>, 2001.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, write to the Free
Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
02111-1307 USA. */
#include <fenv.h>
int
fedisableexcept (int excepts)
{
unsigned short int new_exc, old_exc;
unsigned int new;
excepts &= FE_ALL_EXCEPT;
/* Get the current control word of the x87 FPU. */
__asm__ ("fstcw %0" : "=m" (*&new_exc));
old_exc = (~new_exc) & FE_ALL_EXCEPT;
new_exc |= excepts;
__asm__ ("fldcw %0" : : "m" (*&new_exc));
/* And now the same for the SSE MXCSR register. */
__asm__ ("stmxcsr %0" : "=m" (*&new));
/* The SSE exception masks are shifted by 7 bits. */
new |= excepts << 7;
__asm__ ("ldmxcsr %0" : : "m" (*&new));
return old_exc;
}