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2002-06-05 Brian Youmans <3diff@gnu.org> * sysdeps/ia64/fpu/e_acos.S: Added text of Intel license. * sysdeps/ia64/fpu/e_acosf.S: Likewise. * sysdeps/ia64/fpu/e_acosl.S: Likewise. * sysdeps/ia64/fpu/e_asin.S: Likewise. * sysdeps/ia64/fpu/e_asinf.S: Likewise. * sysdeps/ia64/fpu/e_asinl.S: Likewise. * sysdeps/ia64/fpu/e_atan2.S: Likewise. * sysdeps/ia64/fpu/e_atan2f.S: Likewise. * sysdeps/ia64/fpu/e_cosh.S: Likewise. * sysdeps/ia64/fpu/e_coshf.S: Likewise. * sysdeps/ia64/fpu/e_coshl.S: Likewise. * sysdeps/ia64/fpu/e_exp.S: Likewise. * sysdeps/ia64/fpu/e_expf.S: Likewise. * sysdeps/ia64/fpu/e_fmod.S: Likewise. * sysdeps/ia64/fpu/e_fmodf.S: Likewise. * sysdeps/ia64/fpu/e_fmodl.S: Likewise. * sysdeps/ia64/fpu/e_hypot.S: Likewise. * sysdeps/ia64/fpu/e_hypotf.S: Likewise. * sysdeps/ia64/fpu/e_hypotl.S: Likewise. * sysdeps/ia64/fpu/e_log.S: Likewise. * sysdeps/ia64/fpu/e_logf.S: Likewise. * sysdeps/ia64/fpu/e_pow.S: Likewise. * sysdeps/ia64/fpu/e_powf.S: Likewise. * sysdeps/ia64/fpu/e_powl.S: Likewise. * sysdeps/ia64/fpu/e_remainder.S: Likewise. * sysdeps/ia64/fpu/e_remainderf.S: Likewise. * sysdeps/ia64/fpu/e_remainderl.S: Likewise. * sysdeps/ia64/fpu/e_scalb.S: Likewise. * sysdeps/ia64/fpu/e_scalbf.S: Likewise. * sysdeps/ia64/fpu/e_scalbl.S: Likewise. * sysdeps/ia64/fpu/e_sinh.S: Likewise. * sysdeps/ia64/fpu/e_sinhf.S: Likewise. * sysdeps/ia64/fpu/e_sinhl.S: Likewise. * sysdeps/ia64/fpu/e_sqrt.S: Likewise. * sysdeps/ia64/fpu/e_sqrtf.S: Likewise. * sysdeps/ia64/fpu/e_sqrtl.S: Likewise. * sysdeps/ia64/fpu/libm_atan2_req.S: Likewise. * sysdeps/ia64/fpu/libm_error.c: Likewise. * sysdeps/ia64/fpu/libm_frexp4.S: Likewise. * sysdeps/ia64/fpu/libm_frexp4f.S: Likewise. * sysdeps/ia64/fpu/s_frexpl.c: Likewise. * sysdeps/ia64/fpu/s_ilogb.S: Likewise. * sysdeps/ia64/fpu/s_ilogbf.S: Likewise. * sysdeps/ia64/fpu/s_ilogbl.S: Likewise. * sysdeps/ia64/fpu/s_ldexp.S: Likewise. * sysdeps/ia64/fpu/s_ldexpf.S: Likewise. * sysdeps/ia64/fpu/s_ldexpl.S: Likewise. * sysdeps/ia64/fpu/s_log1p.S: Likewise. * sysdeps/ia64/fpu/s_log1pf.S: Likewise. * sysdeps/ia64/fpu/s_log1pl.S: Likewise. * sysdeps/ia64/fpu/s_logb.S: Likewise. * sysdeps/ia64/fpu/s_logbf.S: Likewise. * sysdeps/ia64/fpu/s_logbl.S: Likewise. * sysdeps/ia64/fpu/s_modf.S: Likewise. * sysdeps/ia64/fpu/s_modff.S: Likewise. * sysdeps/ia64/fpu/s_modfl.S: Likewise. * sysdeps/ia64/fpu/s_nearbyint.S: Likewise. * sysdeps/ia64/fpu/s_nearbyintf.S: Likewise. * sysdeps/ia64/fpu/s_nearbyintl.S: Likewise. * sysdeps/ia64/fpu/s_rint.S: Likewise. * sysdeps/ia64/fpu/s_rintf.S: Likewise. * sysdeps/ia64/fpu/s_rintl.S: Likewise. * sysdeps/ia64/fpu/s_round.S: Likewise. * sysdeps/ia64/fpu/s_roundf.S: Likewise. * sysdeps/ia64/fpu/s_roundl.S: Likewise. * sysdeps/ia64/fpu/s_scalbn.S: Likewise. * sysdeps/ia64/fpu/s_scalbnf.S: Likewise. * sysdeps/ia64/fpu/s_scalbnl.S: Likewise. * sysdeps/ia64/fpu/s_significand.S: Likewise. * sysdeps/ia64/fpu/s_significandf.S: Likewise. * sysdeps/ia64/fpu/s_significandl.S: Likewise. * sysdeps/ia64/fpu/s_tan.S: Likewise. * sysdeps/ia64/fpu/s_tanf.S: Likewise. * sysdeps/ia64/fpu/s_tanl.S: Likewise. * sysdeps/ia64/fpu/s_trunc.S: Likewise. * sysdeps/ia64/fpu/s_truncf.S: Likewise. * sysdeps/ia64/fpu/s_truncl.S: Likewise. * sysdeps/ieee754/dbl-64/doasin.c: Changed copyright notice to reflect IBM donation of math library to FSF * sysdeps/ieee754/dbl-64/dosincos.c: Likewise. * sysdeps/ieee754/dbl-64/e_asin.c: Likewise. * sysdeps/ieee754/dbl-64/e_atan2.c: Likewise. * sysdeps/ieee754/dbl-64/e_exp.c: Likewise. * sysdeps/ieee754/dbl-64/e_log.c: Likewise. * sysdeps/ieee754/dbl-64/e_pow.c: Likewise. * sysdeps/ieee754/dbl-64/e_remainder.c: Likewise. * sysdeps/ieee754/dbl-64/e_sqrt.c: Likewise. * sysdeps/ieee754/dbl-64/halfulp.c: Likewise. * sysdeps/ieee754/dbl-64/mpa.c: Likewise. * sysdeps/ieee754/dbl-64/mpatan.c: Likewise. * sysdeps/ieee754/dbl-64/mpatan2.c: Likewise. * sysdeps/ieee754/dbl-64/mpexp.c: Likewise. * sysdeps/ieee754/dbl-64/mplog.c: Likewise. * sysdeps/ieee754/dbl-64/mpsqrt.c: Likewise. * sysdeps/ieee754/dbl-64/mptan.c: Likewise. * sysdeps/ieee754/dbl-64/s_atan.c: Likewise. * sysdeps/ieee754/dbl-64/s_sin.c: Likewise. * sysdeps/ieee754/dbl-64/s_tan.c: Likewise. * sysdeps/ieee754/dbl-64/sincos32.c: Likewise. * sysdeps/ieee754/dbl-64/slowexp.c: Likewise. * sysdeps/ieee754/dbl-64/slowpow.c: Likewise. * sysdeps/gnu/netinet/udp.h: Added BSD copying permission notice * sysdeps/vax/__longjmp.c: Likewise. * sysdeps/vax/setjmp.c: Likewise. * libio/filedoalloc.c: Fixed BSD copying permission notice to remove advertising clause * sysdeps/vax/htonl.s: Likewise. * sysdeps/vax/htons.s: Likewise. * libio/wfiledoalloc.c: Likewise. * stdlib/random.c: Likewise. * stdlib/random_r.c: Likewise. * sysdeps/mach/sys/reboot.h: Likewise. * inet/getnameinfo.c: Deleted advertising clause from Inner Net License * sysdeps/posix/getaddrinfo.c: Likewise. * sunrpc/des_impl.c: Updated license permission notice to Lesser GPL and corrected pointer to point to the correct license.
633 lines
13 KiB
ArmAsm
633 lines
13 KiB
ArmAsm
.file "remainderl.asm"
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// Copyright (C) 2000, 2001, Intel Corporation
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// All rights reserved.
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//
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// Contributed 2/2/2000 by John Harrison, Cristina Iordache, Ted Kubaska,
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// Bob Norin, Shane Story, and Ping Tak Peter Tang of the Computational
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// Software Lab, Intel Corporation.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// * Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// * The name of Intel Corporation may not be used to endorse or promote
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// products derived from this software without specific prior written
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// permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
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// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Intel Corporation is the author of this code, and requests that all
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// problem reports or change requests be submitted to it directly at
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// http://developer.intel.com/opensource.
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//
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// History
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//====================================================================
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// 2/02/00 Initial version
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// 3/02/00 New algorithm
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// 4/04/00 Unwind support added
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// 7/21/00 Fixed quotient=2^{24*m+23}*1.q1...q23 1 bug
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// 8/15/00 Bundle added after call to __libm_error_support to properly
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// set [the previously overwritten] GR_Parameter_RESULT.
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//11/29/00 Set FR_Y to f9
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//
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// API
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//====================================================================
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// long double remainderl(long double,long double);
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//
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// Overview of operation
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//====================================================================
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// remainder(a,b)=a-i*b,
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// where i is an integer such that, if b!=0 and a is finite,
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// |a/b-i|<=1/2. If |a/b-i|=1/2, i is even.
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//
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// Algorithm
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//====================================================================
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// a). eliminate special cases
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// b). if |a/b|<0.25 (first quotient estimate), return a
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// c). use single precision divide algorithm to get quotient q
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// rounded to 24 bits of precision
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// d). calculate partial remainders (using both q and q-ulp);
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// select one and RZ(a/b) based on the sign of |a|-|b|*q
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// e). if the exponent difference (exponent(a)-exponent(b))
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// is less than 24 (quotient estimate<2^{24}-2), use RZ(a/b)
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// and sticky bits to round to integer; exit loop and
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// calculate final remainder
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// f). if exponent(a)-exponent(b)>=24, select new value of a as
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// the partial remainder calculated using RZ(a/b);
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// repeat from c).
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//
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// Special cases
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//====================================================================
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// a=+/- Inf, or b=+/-0: return NaN, call libm_error_support
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// a=NaN or b=NaN: return NaN
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#include "libm_support.h"
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//
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// Registers used
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//====================================================================
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// Predicate registers: p6-p14
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// General registers: r2,r3,r28,r29,r32 (ar.pfs), r33-r39
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// Floating point registers: f6-f15,f32
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//
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.section .text
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GR_SAVE_B0 = r33
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GR_SAVE_PFS = r34
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GR_SAVE_GP = r35
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GR_SAVE_SP = r36
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GR_Parameter_X = r37
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GR_Parameter_Y = r38
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GR_Parameter_RESULT = r39
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GR_Parameter_TAG = r40
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FR_X = f10
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FR_Y = f9
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FR_RESULT = f8
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.proc remainderl#
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.align 32
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.global remainderl#
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.align 32
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remainderl:
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#ifdef _LIBC
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.global __remainderl
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.type __remainderl,@function
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__remainderl:
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#endif
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// inputs in f8, f9
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// result in f8
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{ .mfi
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alloc r32=ar.pfs,1,4,4,0
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// f13=|a|
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fmerge.s f13=f0,f8
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nop.i 0
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}
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{.mfi
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getf.sig r29=f9
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// f14=|b|
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fmerge.s f14=f0,f9
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nop.i 0;;
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}
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{.mlx
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mov r28=0x2ffdd
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// r2=2^{23}
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movl r3=0x4b000000;;
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}
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{.mmi
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setf.exp f32=r28
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nop.m 0
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// y pseudo-zero ?
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cmp.eq p11,p10=r29,r0;;
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}
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// Y +-NAN, +-inf, +-0? p11
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{ .mfi
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nop.m 999
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(p10) fclass.m p11,p10 = f9, 0xe7
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nop.i 999
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}
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// qnan snan inf norm unorm 0 -+
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// 1 1 1 0 0 0 11
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// e 3
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// X +-NAN, +-inf, ? p9
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{ .mfi
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nop.m 999
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(p0) fclass.m.unc p9,p8 = f8, 0xe3
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nop.i 999;;
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}
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{.mfi
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nop.m 0
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mov f12=f0
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nop.i 0
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}
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{ .mfi
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// set p7=1
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cmp.eq.unc p7,p0=r0,r0
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// Step (1)
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// y0 = 1 / b in f10
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frcpa.s1 f10,p6=f13,f14
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nop.i 0;;
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}
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// Y +-NAN, +-inf, +-0? p11
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{ .mfi
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nop.m 999
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// pseudo-NaN ?
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(p10) fclass.nm p11,p0 = f9, 0xff
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nop.i 999
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}
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// qnan snan inf norm unorm 0 -+
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// 1 1 1 0 0 0 11
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// e 3
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// X +-NAN, +-inf, ? p9
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{ .mfi
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nop.m 999
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(p8) fclass.nm p9,p0 = f8, 0xff
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nop.i 999;;
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}
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{.bbb
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(p9) br.cond.spnt L(FREM_X_NAN_INF)
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(p11) br.cond.spnt L(FREM_Y_NAN_INF_ZERO)
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nop.b 0
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} {.mfi
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nop.m 0
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// set D flag if a (f8) is denormal
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fnma.s0 f6=f8,f1,f8
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nop.i 0;;
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}
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L(remloop24):
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{ .mfi
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nop.m 0
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// Step (2)
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// q0 = a * y0 in f15
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(p6) fma.s1 f12=f13,f10,f0
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nop.i 0
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} { .mfi
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nop.m 0
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// Step (3)
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// e0 = 1 - b * y0 in f7
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(p6) fnma.s1 f7=f14,f10,f1
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nop.i 0;;
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} {.mlx
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nop.m 0
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// r2=1.25*2^{-24}
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movl r2=0x33a00000;;
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}
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{.mfi
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nop.m 0
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// q1=q0*(1+e0)
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fma.s1 f15=f12,f7,f12
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nop.i 0
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}
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{ .mfi
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nop.m 0
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// Step (4)
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// e1 = e0 * e0 + E in f7
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(p6) fma.s1 f7=f7,f7,f32
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nop.i 0;;
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}
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{.mii
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(p7) getf.exp r29=f12
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(p7) mov r28=0xfffd
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nop.i 0;;
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}
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{ .mfi
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// f12=2^{23}
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setf.s f12=r3
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// Step (5)
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// q2 = q1 + e1 * q1 in f11
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(p6) fma.s.s1 f11=f7,f15,f15
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nop.i 0
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} { .mfi
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nop.m 0
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// Step (6)
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// q2 = q1 + e1 * q1 in f6
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(p6) fma.s1 f6=f7,f15,f15
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nop.i 0;;
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}
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{.mmi
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// f15=1.25*2^{-24}
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setf.s f15=r2
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// q<1/4 ? (i.e. expon< -2)
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(p7) cmp.gt p7,p0=r28,r29
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nop.i 0;;
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}
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{.mfb
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// r29= -32+bias
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mov r29=0xffdf
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// if |a/b|<1/4, set D flag before returning
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(p7) fma.s0 f9=f9,f0,f8
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nop.b 0;;
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}
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{.mfb
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nop.m 0
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// can be combined with bundle above if sign of 0 or
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// FTZ enabled are not important
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(p7) fmerge.s f8=f8,f9
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// return if |a|<4*|b| (estimated quotient < 1/4)
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(p7) br.ret.spnt b0;;
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}
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{.mfi
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// f7=2^{-32}
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setf.exp f7=r29
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// set f8 to current a value | sign
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fmerge.s f8=f8,f13
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nop.i 0;;
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}
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{.mfi
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getf.exp r28=f6
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// last step ? (q<2^{23})
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fcmp.lt.unc.s1 p0,p12=f6,f12
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nop.i 0;;
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}
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{.mfi
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nop.m 0
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// r=a-b*q
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fnma.s1 f6=f14,f11,f13
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nop.i 0
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} {.mfi
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// r2=23+bias
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mov r2=0xffff+23
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// q'=q-q*(1.25*2^{-24}) (q'=q-ulp)
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fnma.s.s1 f15=f11,f15,f11
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nop.i 0;;
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}
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{.mmi
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nop.m 0
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cmp.eq p11,p14=r2,r28
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nop.i 0;;
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}
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.pred.rel "mutex",p11,p14
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{.mfi
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nop.m 0
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// if exp_q=2^23, then r=a-b*2^{23}
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(p11) fnma.s1 f13=f12,f14,f13
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nop.i 0
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}
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{.mfi
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nop.m 0
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// r2=a-b*q'
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(p14) fnma.s1 f13=f14,f15,f13
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nop.i 0;;
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}
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{.mfi
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nop.m 0
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// r>0 iff q=RZ(a/b) and inexact
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fcmp.gt.unc.s1 p8,p0=f6,f0
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nop.i 0
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} {.mfi
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nop.m 0
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// r<0 iff q'=RZ(a/b) and inexact
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(p14) fcmp.lt.unc.s1 p9,p10=f6,f0
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nop.i 0;;
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}
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.pred.rel "mutex",p8,p9
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{.mfi
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nop.m 0
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// (p8) Q=q+(last iteration ? sticky bits:0)
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// i.e. Q=q+q*x (x=2^{-32} or 0)
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(p8) fma.s1 f11=f11,f7,f11
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nop.i 0
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} {.mfi
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nop.m 0
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// (p9) Q=q'+(last iteration ? sticky bits:0)
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// i.e. Q=q'+q'*x (x=2^{-32} or 0)
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(p9) fma.s1 f11=f15,f7,f15
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nop.i 0;;
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}
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{.mfb
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nop.m 0
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// (p9) set r=r2 (new a, if not last iteration)
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// (p10) new a =r
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(p10) mov f13=f6
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(p12) br.cond.sptk L(remloop24);;
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}
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// last iteration
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{.mfi
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nop.m 0
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// set f9=|b|*sgn(a)
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fmerge.s f9=f8,f9
|
|
nop.i 0
|
|
}
|
|
{.mfi
|
|
nop.m 0
|
|
// round to integer
|
|
fcvt.fx.s1 f11=f11
|
|
nop.i 0;;
|
|
}
|
|
{.mfi
|
|
nop.m 0
|
|
// save sign of a
|
|
fmerge.s f7=f8,f8
|
|
nop.i 0
|
|
} {.mfi
|
|
nop.m 0
|
|
// normalize
|
|
fcvt.xf f11=f11
|
|
nop.i 0;;
|
|
}
|
|
{.mfi
|
|
nop.m 0
|
|
// This can be removed if sign of 0 is not important
|
|
// get remainder using sf1
|
|
fnma.s1 f12=f9,f11,f8
|
|
nop.i 0
|
|
}
|
|
{.mfi
|
|
nop.m 0
|
|
// get remainder
|
|
fnma.s0 f8=f9,f11,f8
|
|
nop.i 0;;
|
|
}
|
|
{.mfi
|
|
nop.m 0
|
|
// f12=0?
|
|
// This can be removed if sign of 0 is not important
|
|
fcmp.eq.unc.s1 p8,p0=f12,f0
|
|
nop.i 0;;
|
|
}
|
|
{.mfb
|
|
nop.m 0
|
|
// if f8=0, set sign correctly
|
|
// This can be removed if sign of 0 is not important
|
|
(p8) fmerge.s f8=f7,f8
|
|
// return
|
|
br.ret.sptk b0;;
|
|
}
|
|
|
|
|
|
|
|
L(FREM_X_NAN_INF):
|
|
|
|
// Y zero ?
|
|
{.mfi
|
|
nop.m 0
|
|
fma.s1 f10=f9,f1,f0
|
|
nop.i 0;;
|
|
}
|
|
{.mfi
|
|
nop.m 0
|
|
fcmp.eq.unc.s1 p11,p0=f10,f0
|
|
nop.i 0;;
|
|
}
|
|
{.mib
|
|
nop.m 0
|
|
nop.i 0
|
|
// if Y zero
|
|
(p11) br.cond.spnt L(FREM_Y_ZERO);;
|
|
}
|
|
|
|
// X infinity? Return QNAN indefinite
|
|
{ .mfi
|
|
nop.m 999
|
|
(p0) fclass.m.unc p8,p0 = f8, 0x23
|
|
nop.i 999
|
|
}
|
|
// X infinity? Return QNAN indefinite
|
|
{ .mfi
|
|
nop.m 999
|
|
(p0) fclass.m.unc p11,p0 = f8, 0x23
|
|
nop.i 999;;
|
|
}
|
|
// Y NaN ?
|
|
{.mfi
|
|
nop.m 999
|
|
(p8) fclass.m.unc p0,p8=f9,0xc3
|
|
nop.i 0;;
|
|
}
|
|
{.mfi
|
|
nop.m 999
|
|
// also set Denormal flag if necessary
|
|
(p8) fnma.s0 f9=f9,f1,f9
|
|
nop.i 0
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
(p8) frcpa.s0 f8,p7 = f8,f8
|
|
nop.i 999 ;;
|
|
}
|
|
|
|
{.mfi
|
|
nop.m 999
|
|
(p11) mov f10=f8
|
|
nop.i 0
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
(p8) fma f8=f8,f1,f0
|
|
nop.i 0 ;;
|
|
}
|
|
|
|
{ .mfb
|
|
nop.m 999
|
|
frcpa.s0 f8,p7=f8,f9
|
|
(p11) br.cond.spnt L(EXP_ERROR_RETURN);;
|
|
}
|
|
{ .mib
|
|
nop.m 0
|
|
nop.i 0
|
|
br.ret.spnt b0 ;;
|
|
}
|
|
|
|
|
|
L(FREM_Y_NAN_INF_ZERO):
|
|
// Y INF
|
|
{ .mfi
|
|
nop.m 999
|
|
(p0) fclass.m.unc p7,p0 = f9, 0x23
|
|
nop.i 999 ;;
|
|
}
|
|
|
|
{ .mfb
|
|
nop.m 999
|
|
(p7) fma f8=f8,f1,f0
|
|
(p7) br.ret.spnt b0 ;;
|
|
}
|
|
|
|
// Y NAN?
|
|
{ .mfi
|
|
nop.m 999
|
|
(p0) fclass.m.unc p9,p10 = f9, 0xc3
|
|
nop.i 999 ;;
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
(p10) fclass.nm p9,p0 = f9, 0xff
|
|
nop.i 999 ;;
|
|
}
|
|
|
|
{ .mfb
|
|
nop.m 999
|
|
(p9) fma f8=f9,f1,f0
|
|
(p9) br.ret.spnt b0 ;;
|
|
}
|
|
|
|
L(FREM_Y_ZERO):
|
|
// Y zero? Must be zero at this point
|
|
// because it is the only choice left.
|
|
// Return QNAN indefinite
|
|
|
|
// X NAN?
|
|
{ .mfi
|
|
nop.m 999
|
|
(p0) fclass.m.unc p9,p10 = f8, 0xc3
|
|
nop.i 999 ;;
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
(p10) fclass.nm p9,p10 = f8, 0xff
|
|
nop.i 999 ;;
|
|
}
|
|
|
|
{.mfi
|
|
nop.m 999
|
|
(p9) frcpa f11,p7=f8,f0
|
|
nop.i 0;;
|
|
}
|
|
{ .mfi
|
|
nop.m 999
|
|
(p10) frcpa f11,p7 = f0,f0
|
|
nop.i 999;;
|
|
}
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
(p0) fmerge.s f10 = f8, f8
|
|
nop.i 999
|
|
}
|
|
|
|
{ .mfi
|
|
nop.m 999
|
|
(p0) fma f8=f11,f1,f0
|
|
nop.i 999;;
|
|
}
|
|
|
|
L(EXP_ERROR_RETURN):
|
|
|
|
{ .mib
|
|
(p0) mov GR_Parameter_TAG = 123
|
|
nop.i 999
|
|
(p0) br.sptk __libm_error_region;;
|
|
}
|
|
|
|
.endp remainderl
|
|
ASM_SIZE_DIRECTIVE(remainderl)
|
|
#ifdef _LIBC
|
|
ASM_SIZE_DIRECTIVE(__remainderl)
|
|
#endif
|
|
|
|
.proc __libm_error_region
|
|
__libm_error_region:
|
|
.prologue
|
|
{ .mfi
|
|
add GR_Parameter_Y=-32,sp // Parameter 2 value
|
|
nop.f 0
|
|
.save ar.pfs,GR_SAVE_PFS
|
|
mov GR_SAVE_PFS=ar.pfs // Save ar.pfs
|
|
}
|
|
{ .mfi
|
|
.fframe 64
|
|
add sp=-64,sp // Create new stack
|
|
nop.f 0
|
|
mov GR_SAVE_GP=gp // Save gp
|
|
};;
|
|
{ .mmi
|
|
stfe [GR_Parameter_Y] = FR_Y,16 // Save Parameter 2 on stack
|
|
add GR_Parameter_X = 16,sp // Parameter 1 address
|
|
.save b0, GR_SAVE_B0
|
|
mov GR_SAVE_B0=b0 // Save b0
|
|
};;
|
|
.body
|
|
{ .mib
|
|
stfe [GR_Parameter_X] = FR_X // Store Parameter 1 on stack
|
|
add GR_Parameter_RESULT = 0,GR_Parameter_Y
|
|
nop.b 0 // Parameter 3 address
|
|
}
|
|
{ .mib
|
|
stfe [GR_Parameter_Y] = FR_RESULT // Store Parameter 3 on stack
|
|
add GR_Parameter_Y = -16,GR_Parameter_Y
|
|
br.call.sptk b0=__libm_error_support# // Call error handling function
|
|
};;
|
|
{ .mmi
|
|
nop.m 0
|
|
nop.m 0
|
|
add GR_Parameter_RESULT = 48,sp
|
|
};;
|
|
{ .mmi
|
|
ldfe f8 = [GR_Parameter_RESULT] // Get return result off stack
|
|
.restore sp
|
|
add sp = 64,sp // Restore stack pointer
|
|
mov b0 = GR_SAVE_B0 // Restore return address
|
|
};;
|
|
{ .mib
|
|
mov gp = GR_SAVE_GP // Restore gp
|
|
mov ar.pfs = GR_SAVE_PFS // Restore ar.pfs
|
|
br.ret.sptk b0 // Return
|
|
};;
|
|
|
|
.endp __libm_error_region
|
|
ASM_SIZE_DIRECTIVE(__libm_error_region)
|
|
|
|
|
|
.type __libm_error_support#,@function
|
|
.global __libm_error_support#
|