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Vector registers perform much better for moves compared to pairs of registers on falkor, so use them instead. This results in a time reduction of up to 50% (i.e. 2x improvement) for a lot of the smaller sizes, i.e. up to 1K in memmove-walk. Improvements for larger sizes are smaller, at about 1%-2%. * sysdeps/aarch64/multiarch/memmove_falkor.S (__memcpy_falkor): Use vector registers.
226 lines
5.2 KiB
ArmAsm
226 lines
5.2 KiB
ArmAsm
/* Copyright (C) 2017-2018 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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/* Assumptions: ARMv8-a, AArch64, falkor, unaligned accesses. */
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#define dstin x0
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#define src x1
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#define count x2
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#define dst x3
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#define srcend x4
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#define dstend x5
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#define A_x x6
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#define B_x x7
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#define A_w w6
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#define B_w w7
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#define tmp1 x14
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#define Q_q q6
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#define A_q q22
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#define B_q q18
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#define C_q q19
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#define D_q q20
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#define E_q q21
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#define F_q q17
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#define G_q q23
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/* RATIONALE:
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The move has 4 distinct parts:
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* Small moves of 16 bytes and under
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* Medium sized moves of 17-96 bytes
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* Large moves where the source address is higher than the destination
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(forward copies)
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* Large moves where the destination address is higher than the source
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(copy backward, or move).
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We use only two registers q6 and q22 for the moves and move 32 bytes at a
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time to correctly train the hardware prefetcher for better throughput. */
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ENTRY_ALIGN (__memmove_falkor, 6)
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sub tmp1, dstin, src
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add srcend, src, count
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add dstend, dstin, count
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cmp count, 96
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ccmp tmp1, count, 2, hi
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b.lo L(move_long)
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cmp count, 16
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b.ls L(copy16)
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cmp count, 96
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b.hi L(copy_long)
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/* Medium copies: 17..96 bytes. */
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sub tmp1, count, 1
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ldr A_q, [src]
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tbnz tmp1, 6, L(copy96)
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ldr D_q, [srcend, -16]
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tbz tmp1, 5, 1f
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ldr B_q, [src, 16]
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ldr C_q, [srcend, -32]
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str B_q, [dstin, 16]
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str C_q, [dstend, -32]
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1:
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str A_q, [dstin]
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str D_q, [dstend, -16]
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ret
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.p2align 4
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/* Small copies: 0..16 bytes. */
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L(copy16):
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cmp count, 8
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b.lo 1f
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ldr A_x, [src]
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ldr B_x, [srcend, -8]
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str A_x, [dstin]
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str B_x, [dstend, -8]
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ret
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.p2align 4
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1:
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/* 4-7 */
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tbz count, 2, 1f
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ldr A_w, [src]
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ldr B_w, [srcend, -4]
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str A_w, [dstin]
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str B_w, [dstend, -4]
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ret
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.p2align 4
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1:
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/* 2-3 */
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tbz count, 1, 1f
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ldrh A_w, [src]
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ldrh B_w, [srcend, -2]
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strh A_w, [dstin]
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strh B_w, [dstend, -2]
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ret
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.p2align 4
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1:
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/* 0-1 */
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tbz count, 0, 1f
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ldrb A_w, [src]
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strb A_w, [dstin]
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1: ret
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.p2align 4
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/* Copy 64..96 bytes. Copy 64 bytes from the start and
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32 bytes from the end. */
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L(copy96):
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ldr B_q, [src, 16]
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ldr C_q, [src, 32]
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ldr D_q, [src, 48]
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ldr E_q, [srcend, -32]
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ldr F_q, [srcend, -16]
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str A_q, [dstin]
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str B_q, [dstin, 16]
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str C_q, [dstin, 32]
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str D_q, [dstin, 48]
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str E_q, [dstend, -32]
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str F_q, [dstend, -16]
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ret
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/* Align SRC to 16 byte alignment so that we don't cross cache line
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boundaries on both loads and stores. There are at least 96 bytes
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to copy, so copy 16 bytes unaligned and then align. The loop
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copies 32 bytes per iteration and prefetches one iteration ahead. */
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.p2align 4
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L(copy_long):
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ldr A_q, [src]
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and tmp1, src, 15
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bic src, src, 15
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sub dst, dstin, tmp1
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add count, count, tmp1 /* Count is now 16 too large. */
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ldr Q_q, [src, 16]!
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str A_q, [dstin]
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ldr A_q, [src, 16]!
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subs count, count, 32 + 64 + 16 /* Test and readjust count. */
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b.ls L(last64)
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L(loop64):
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subs count, count, 32
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str Q_q, [dst, 16]
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ldr Q_q, [src, 16]!
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str A_q, [dst, 32]!
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ldr A_q, [src, 16]!
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b.hi L(loop64)
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/* Write the last full set of 64 bytes. The remainder is at most 64
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bytes and at least 33 bytes, so it is safe to always copy 64 bytes
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from the end. */
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L(last64):
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ldr C_q, [srcend, -64]
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str Q_q, [dst, 16]
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ldr B_q, [srcend, -48]
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str A_q, [dst, 32]
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ldr A_q, [srcend, -32]
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ldr D_q, [srcend, -16]
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str C_q, [dstend, -64]
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str B_q, [dstend, -48]
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str A_q, [dstend, -32]
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str D_q, [dstend, -16]
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ret
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.p2align 4
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L(move_long):
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cbz tmp1, 3f
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/* Align SRCEND to 16 byte alignment so that we don't cross cache line
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boundaries on both loads and stores. There are at least 96 bytes
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to copy, so copy 16 bytes unaligned and then align. The loop
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copies 32 bytes per iteration and prefetches one iteration ahead. */
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ldr A_q, [srcend, -16]
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and tmp1, srcend, 15
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sub srcend, srcend, tmp1
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ldr Q_q, [srcend, -16]!
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str A_q, [dstend, -16]
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sub count, count, tmp1
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ldr A_q, [srcend, -16]!
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sub dstend, dstend, tmp1
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subs count, count, 32 + 64
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b.ls 2f
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1:
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subs count, count, 32
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str Q_q, [dstend, -16]
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ldr Q_q, [srcend, -16]!
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str A_q, [dstend, -32]!
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ldr A_q, [srcend, -16]!
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b.hi 1b
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/* Write the last full set of 64 bytes. The remainder is at most 64
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bytes and at least 33 bytes, so it is safe to always copy 64 bytes
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from the start. */
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2:
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ldr C_q, [src, 48]
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str Q_q, [dstend, -16]
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ldr B_q, [src, 32]
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str A_q, [dstend, -32]
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ldr A_q, [src, 16]
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ldr D_q, [src]
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str C_q, [dstin, 48]
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str B_q, [dstin, 32]
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str A_q, [dstin, 16]
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str D_q, [dstin]
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3: ret
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END (__memmove_falkor)
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libc_hidden_builtin_def (__memmove_falkor)
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