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389d1f1b23
* sysdeps/aarch64/crti.S: Add include of sysdep.h. (call_weak_fn): Use PTR_REG to get correct reg name in ILP32. * sysdeps/aarch64/dl-irel.h: Add include of sysdep.h. (elf_irela): Use AARCH64_R macro to get correct relocation in ILP32. * sysdeps/aarch64/dl-machine.h: Add include of sysdep.h. (elf_machine_load_address, RTLD_START, RTLD_START_1, RTLD_START, elf_machine_type_class, ELF_MACHINE_JMP_SLOT, elf_machine_rela, elf_machine_lazy_rel): Add ifdef's for ILP32 support. * sysdeps/aarch64/dl-tlsdesc.S (_dl_tlsdesc_return, _dl_tlsdesc_return_lazy, _dl_tlsdesc_dynamic, _dl_tlsdesc_resolve_hold): Extend pointers in ILP32, use PTR_REG to get correct reg name for ILP32. * sysdeps/aarch64/dl-trampoline.S (ip01): New Macro. (RELA_SIZE): New Macro. (_dl_runtime_resolve, _dl_runtime_profile): Use new macros and PTR_REG to support ILP32. * sysdeps/aarch64/jmpbuf-unwind.h (_JMPBUF_CFA_UNWINDS_ADJ): Add cast for ILP32 mode. * sysdeps/aarch64/memcmp.S (memcmp): Extend arg pointers for ILP32 mode. * sysdeps/aarch64/memcpy.S (memmove, memcpy): Ditto. * sysdeps/aarch64/memset.S (__memset): Ditto. * sysdeps/aarch64/strchr.S (strchr): Ditto. * sysdeps/aarch64/strchrnul.S (__strchrnul): Ditto. * sysdeps/aarch64/strcmp.S (strcmp): Ditto. * sysdeps/aarch64/strcpy.S (strcpy): Ditto. * sysdeps/aarch64/strlen.S (__strlen): Ditto. * sysdeps/aarch64/strncmp.S (strncmp): Ditto. * sysdeps/aarch64/strnlen.S (strnlen): Ditto. * sysdeps/aarch64/strrchr.S (strrchr): Ditto. * sysdeps/unix/sysv/linux/aarch64/clone.S: Ditto. * sysdeps/unix/sysv/linux/aarch64/setcontext.S (__setcontext): Ditto. * sysdeps/unix/sysv/linux/aarch64/swapcontext.S (__swapcontext): Ditto. * sysdeps/aarch64/__longjmp.S (__longjmp): Extend pointers in ILP32, change PTR_MANGLE call to use register numbers instead of names. * sysdeps/unix/sysv/linux/aarch64/getcontext.S (__getcontext): Ditto. * sysdeps/aarch64/setjmp.S (__sigsetjmp): Extend arg pointers for ILP32 mode, change PTR_MANGLE calls to use register numbers. * sysdeps/aarch64/start.S (_start): Ditto. * sysdeps/aarch64/nptl/bits/pthreadtypes.h (__PTHREAD_RWLOCK_INT_FLAGS_SHARED): New define. (__SIZEOF_PTHREAD_ATTR_T, __SIZEOF_PTHREAD_MUTEX_T, __SIZEOF_PTHREAD_MUTEXATTR_T, __SIZEOF_PTHREAD_COND_T, __SIZEOF_PTHREAD_COND_COMPAT_T, __SIZEOF_PTHREAD_CONDATTR_T, __SIZEOF_PTHREAD_RWLOCK_T, __SIZEOF_PTHREAD_RWLOCKATTR_T, __SIZEOF_PTHREAD_BARRIER_T, __SIZEOF_PTHREAD_BARRIERATTR_T): Make defined values dependent on __ILP32__. * sysdeps/aarch64/nptl/bits/semaphore.h (__SIZEOF_SEM_T): Change define. (sem_t): Change __align type. * sysdeps/aarch64/sysdep.h (AARCH64_R, PTR_REG, PTR_LOG_SIZE, DELOUSE, PTR_SIZE): New Macros. (LDST_PCREL, LDST_GLOBAL) Update to use PTR_REG. * sysdeps/unix/sysv/linux/aarch64/bits/fcntl.h (O_LARGEFILE): Set when in ILP32 mode. (F_GETLK64, F_SETLK64, F_SETLKW64): Only set in LP64 mode. * sysdeps/unix/sysv/linux/aarch64/dl-cache.h (DL_CACHE_DEFAULT_ID): Set elf flags for ILP32. (add_system_dir): Set ILP32 library directories. * sysdeps/unix/sysv/linux/aarch64/init-first.c (_libc_vdso_platform_setup): Set minimum kernel version for ILP32. * sysdeps/unix/sysv/linux/aarch64/ldconfig.h (SYSDEP_KNOWN_INTERPRETER_NAMES): Add ILP32 names. * sysdeps/unix/sysv/linux/aarch64/sigcontextinfo.h (GET_PC, SET_PC): New Macros. * sysdeps/unix/sysv/linux/aarch64/sysdep.h: Handle ILP32 pointers.
155 lines
3.9 KiB
ArmAsm
155 lines
3.9 KiB
ArmAsm
/* memcmp - compare memory
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Copyright (C) 2013-2016 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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/* Assumptions:
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*
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* ARMv8-a, AArch64
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*/
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/* Parameters and result. */
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#define src1 x0
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#define src2 x1
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#define limit x2
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#define result x0
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/* Internal variables. */
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#define data1 x3
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#define data1w w3
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#define data2 x4
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#define data2w w4
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#define has_nul x5
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#define diff x6
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#define endloop x7
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#define tmp1 x8
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#define tmp2 x9
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#define tmp3 x10
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#define pos x11
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#define limit_wd x12
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#define mask x13
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ENTRY_ALIGN (memcmp, 6)
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DELOUSE (0)
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DELOUSE (1)
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DELOUSE (2)
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cbz limit, L(ret0)
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eor tmp1, src1, src2
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tst tmp1, #7
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b.ne L(misaligned8)
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ands tmp1, src1, #7
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b.ne L(mutual_align)
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add limit_wd, limit, #7
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lsr limit_wd, limit_wd, #3
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/* Start of performance-critical section -- one 64B cache line. */
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L(loop_aligned):
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ldr data1, [src1], #8
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ldr data2, [src2], #8
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L(start_realigned):
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subs limit_wd, limit_wd, #1
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eor diff, data1, data2 /* Non-zero if differences found. */
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csinv endloop, diff, xzr, ne /* Last Dword or differences. */
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cbz endloop, L(loop_aligned)
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/* End of performance-critical section -- one 64B cache line. */
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/* Not reached the limit, must have found a diff. */
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cbnz limit_wd, L(not_limit)
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/* Limit % 8 == 0 => all bytes significant. */
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ands limit, limit, #7
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b.eq L(not_limit)
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lsl limit, limit, #3 /* Bits -> bytes. */
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mov mask, #~0
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#ifdef __AARCH64EB__
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lsr mask, mask, limit
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#else
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lsl mask, mask, limit
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#endif
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bic data1, data1, mask
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bic data2, data2, mask
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orr diff, diff, mask
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L(not_limit):
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#ifndef __AARCH64EB__
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rev diff, diff
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rev data1, data1
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rev data2, data2
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#endif
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/* The MS-non-zero bit of DIFF marks either the first bit
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that is different, or the end of the significant data.
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Shifting left now will bring the critical information into the
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top bits. */
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clz pos, diff
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lsl data1, data1, pos
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lsl data2, data2, pos
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/* But we need to zero-extend (char is unsigned) the value and then
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perform a signed 32-bit subtraction. */
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lsr data1, data1, #56
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sub result, data1, data2, lsr #56
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RET
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L(mutual_align):
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/* Sources are mutually aligned, but are not currently at an
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alignment boundary. Round down the addresses and then mask off
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the bytes that precede the start point. */
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bic src1, src1, #7
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bic src2, src2, #7
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add limit, limit, tmp1 /* Adjust the limit for the extra. */
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lsl tmp1, tmp1, #3 /* Bytes beyond alignment -> bits. */
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ldr data1, [src1], #8
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neg tmp1, tmp1 /* Bits to alignment -64. */
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ldr data2, [src2], #8
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mov tmp2, #~0
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#ifdef __AARCH64EB__
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/* Big-endian. Early bytes are at MSB. */
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lsl tmp2, tmp2, tmp1 /* Shift (tmp1 & 63). */
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#else
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/* Little-endian. Early bytes are at LSB. */
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lsr tmp2, tmp2, tmp1 /* Shift (tmp1 & 63). */
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#endif
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add limit_wd, limit, #7
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orr data1, data1, tmp2
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orr data2, data2, tmp2
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lsr limit_wd, limit_wd, #3
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b L(start_realigned)
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L(ret0):
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mov result, #0
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RET
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.p2align 6
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L(misaligned8):
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sub limit, limit, #1
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1:
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/* Perhaps we can do better than this. */
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ldrb data1w, [src1], #1
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ldrb data2w, [src2], #1
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subs limit, limit, #1
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ccmp data1w, data2w, #0, cs /* NZCV = 0b0000. */
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b.eq 1b
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sub result, data1, data2
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RET
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END (memcmp)
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#undef bcmp
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weak_alias (memcmp, bcmp)
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libc_hidden_builtin_def (memcmp)
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