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37ecc657b2
1. Refactor files so that all implementations are in the multiarch
directory
- Moved the implementation portion of memset sse2 from memset.S to
multiarch/memset-sse2.S
- The non-multiarch file now only includes one of the
implementations in the multiarch directory based on the compiled
ISA level (only used for non-multiarch builds. Otherwise we go
through the ifunc selector).
2. Add ISA level build guards to different implementations.
- I.e memset-avx2-unaligned-erms.S which is ISA level 3 will only
build if compiled ISA level <= 3. Otherwise there is no reason
to include it as we will always use one of the ISA level 4
implementations (memset-evex-unaligned-erms.S).
3. Add new multiarch/rtld-memset.S that just include the
non-multiarch memset.S which will in turn select the best
implementation based on the compiled ISA level.
4. Refactor the ifunc selector and ifunc implementation list to use
the ISA level aware wrapper macros that allow functions below the
compiled ISA level (with a guranteed replacement) to be skipped.
Tested with and without multiarch on x86_64 for ISA levels:
{generic, x86-64-v2, x86-64-v3, x86-64-v4}
And m32 with and without multiarch.
201 lines
4.3 KiB
ArmAsm
201 lines
4.3 KiB
ArmAsm
/* memset optimized with AVX512 for KNL hardware.
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Copyright (C) 2015-2022 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#include <isa-level.h>
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#if ISA_SHOULD_BUILD (4)
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#include "asm-syntax.h"
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#ifndef MEMSET
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# define MEMSET __memset_avx512_no_vzeroupper
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# define MEMSET_CHK __memset_chk_avx512_no_vzeroupper
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#endif
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.section .text.avx512,"ax",@progbits
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#if defined PIC
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ENTRY (MEMSET_CHK)
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cmp %RDX_LP, %RCX_LP
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jb HIDDEN_JUMPTARGET (__chk_fail)
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END (MEMSET_CHK)
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#endif
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ENTRY (MEMSET)
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# ifdef __ILP32__
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/* Clear the upper 32 bits. */
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mov %edx, %edx
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# endif
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vpxor %xmm0, %xmm0, %xmm0
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vmovd %esi, %xmm1
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lea (%rdi, %rdx), %rsi
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mov %rdi, %rax
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vpshufb %xmm0, %xmm1, %xmm0
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cmp $16, %rdx
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jb L(less_16bytes)
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cmp $512, %rdx
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vbroadcastss %xmm0, %zmm2
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ja L(512bytesormore)
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cmp $256, %rdx
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jb L(less_256bytes)
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vmovups %zmm2, (%rdi)
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vmovups %zmm2, 0x40(%rdi)
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vmovups %zmm2, 0x80(%rdi)
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vmovups %zmm2, 0xC0(%rdi)
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vmovups %zmm2, -0x100(%rsi)
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vmovups %zmm2, -0xC0(%rsi)
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vmovups %zmm2, -0x80(%rsi)
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vmovups %zmm2, -0x40(%rsi)
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ret
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L(less_256bytes):
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cmp $128, %dl
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jb L(less_128bytes)
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vmovups %zmm2, (%rdi)
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vmovups %zmm2, 0x40(%rdi)
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vmovups %zmm2, -0x80(%rsi)
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vmovups %zmm2, -0x40(%rsi)
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ret
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L(less_128bytes):
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cmp $64, %dl
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jb L(less_64bytes)
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vmovups %zmm2, (%rdi)
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vmovups %zmm2, -0x40(%rsi)
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ret
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L(less_64bytes):
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cmp $32, %dl
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jb L(less_32bytes)
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vmovdqu %ymm2, (%rdi)
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vmovdqu %ymm2, -0x20(%rsi)
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ret
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L(less_32bytes):
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vmovdqu %xmm0, (%rdi)
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vmovdqu %xmm0, -0x10(%rsi)
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ret
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L(less_16bytes):
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cmp $8, %dl
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jb L(less_8bytes)
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vmovq %xmm0, (%rdi)
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vmovq %xmm0, -0x08(%rsi)
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ret
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L(less_8bytes):
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vmovd %xmm0, %ecx
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cmp $4, %dl
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jb L(less_4bytes)
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mov %ecx, (%rdi)
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mov %ecx, -0x04(%rsi)
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ret
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L(less_4bytes):
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cmp $2, %dl
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jb L(less_2bytes)
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mov %cx, (%rdi)
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mov %cx, -0x02(%rsi)
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ret
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L(less_2bytes):
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cmp $1, %dl
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jb L(less_1bytes)
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mov %cl, (%rdi)
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L(less_1bytes):
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ret
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L(512bytesormore):
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mov __x86_shared_cache_size_half(%rip), %rcx
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cmp %rcx, %rdx
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ja L(preloop_large)
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cmp $1024, %rdx
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ja L(1024bytesormore)
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vmovups %zmm2, (%rdi)
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vmovups %zmm2, 0x40(%rdi)
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vmovups %zmm2, 0x80(%rdi)
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vmovups %zmm2, 0xC0(%rdi)
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vmovups %zmm2, 0x100(%rdi)
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vmovups %zmm2, 0x140(%rdi)
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vmovups %zmm2, 0x180(%rdi)
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vmovups %zmm2, 0x1C0(%rdi)
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vmovups %zmm2, -0x200(%rsi)
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vmovups %zmm2, -0x1C0(%rsi)
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vmovups %zmm2, -0x180(%rsi)
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vmovups %zmm2, -0x140(%rsi)
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vmovups %zmm2, -0x100(%rsi)
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vmovups %zmm2, -0xC0(%rsi)
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vmovups %zmm2, -0x80(%rsi)
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vmovups %zmm2, -0x40(%rsi)
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ret
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/* Align on 64 and loop with aligned stores. */
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L(1024bytesormore):
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sub $0x100, %rsi
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vmovups %zmm2, (%rax)
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and $-0x40, %rdi
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add $0x40, %rdi
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L(gobble_256bytes_loop):
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vmovaps %zmm2, (%rdi)
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vmovaps %zmm2, 0x40(%rdi)
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vmovaps %zmm2, 0x80(%rdi)
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vmovaps %zmm2, 0xC0(%rdi)
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add $0x100, %rdi
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cmp %rsi, %rdi
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jb L(gobble_256bytes_loop)
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vmovups %zmm2, (%rsi)
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vmovups %zmm2, 0x40(%rsi)
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vmovups %zmm2, 0x80(%rsi)
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vmovups %zmm2, 0xC0(%rsi)
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ret
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/* Align on 128 and loop with non-temporal stores. */
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L(preloop_large):
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and $-0x80, %rdi
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add $0x80, %rdi
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vmovups %zmm2, (%rax)
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vmovups %zmm2, 0x40(%rax)
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sub $0x200, %rsi
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L(gobble_512bytes_nt_loop):
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vmovntdq %zmm2, (%rdi)
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vmovntdq %zmm2, 0x40(%rdi)
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vmovntdq %zmm2, 0x80(%rdi)
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vmovntdq %zmm2, 0xC0(%rdi)
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vmovntdq %zmm2, 0x100(%rdi)
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vmovntdq %zmm2, 0x140(%rdi)
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vmovntdq %zmm2, 0x180(%rdi)
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vmovntdq %zmm2, 0x1C0(%rdi)
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add $0x200, %rdi
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cmp %rsi, %rdi
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jb L(gobble_512bytes_nt_loop)
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sfence
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vmovups %zmm2, (%rsi)
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vmovups %zmm2, 0x40(%rsi)
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vmovups %zmm2, 0x80(%rsi)
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vmovups %zmm2, 0xC0(%rsi)
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vmovups %zmm2, 0x100(%rsi)
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vmovups %zmm2, 0x140(%rsi)
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vmovups %zmm2, 0x180(%rsi)
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vmovups %zmm2, 0x1C0(%rsi)
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ret
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END (MEMSET)
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#endif
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