glibc/sysdeps/unix/sysv/linux/aarch64/swapcontext.S
Szabolcs Nagy 2b1d7148e3 [AArch64] make setcontext etc functions consistent with the kernel
since
https://sourceware.org/ml/libc-alpha/2014-04/msg00006.html
setcontext etc is no longer tied to the kernel use of ucontext.

in that patch the ucontext reserved space is not used consistently
with the kernel abi: the d8,d9 pair is saved in the slot of q8.

this is ok (*context functions work together), but probably not
desirable (ucontexts created by the kernel and getcontext are
subtly different).

the fix just replaces dN with qN in the save/restore code, which
does a bit more than needed (saves/restores the top half of qN that
is not callee saved), but this should not be an issue (and avoids
having to deal with endianness).

(kernel fpsimd context layout: the first 64bit contains 0x210 the fpsimd
context size and 0x46508001 the FPSIMD_MAGIC, the second 64bit is for
fpsr and fpcr, and the rest is the 128bit q0..q31 registers).

given d8=8.1, d9=9.1,... d15=15.1, the context created by getcontext is

current:

(gdb) x/40xg ctx.uc_mcontext.__reserved
0x410df0 <ctx+464>:     0x0000021046508001      0x0000000000000000
0x410e00 <ctx+480>:     0x0000000000000000      0x0000000000000000
0x410e10 <ctx+496>:     0x0000000000000000      0x0000000000000000
0x410e20 <ctx+512>:     0x0000000000000000      0x0000000000000000
0x410e30 <ctx+528>:     0x0000000000000000      0x0000000000000000
0x410e40 <ctx+544>:     0x0000000000000000      0x0000000000000000
0x410e50 <ctx+560>:     0x0000000000000000      0x0000000000000000
0x410e60 <ctx+576>:     0x0000000000000000      0x0000000000000000
0x410e70 <ctx+592>:     0x0000000000000000      0x0000000000000000
0x410e80 <ctx+608>:     0x4020333333333333      0x4022333333333333
0x410e90 <ctx+624>:     0x0000000000000000      0x0000000000000000
0x410ea0 <ctx+640>:     0x4024333333333333      0x4026333333333333
0x410eb0 <ctx+656>:     0x0000000000000000      0x0000000000000000
0x410ec0 <ctx+672>:     0x4028333333333333      0x402a333333333333
0x410ed0 <ctx+688>:     0x0000000000000000      0x0000000000000000
0x410ee0 <ctx+704>:     0x402c333333333333      0x402e333333333333
0x410ef0 <ctx+720>:     0x0000000000000000      0x0000000000000000
0x410f00 <ctx+736>:     0x0000000000000000      0x0000000000000000
0x410f10 <ctx+752>:     0x0000000000000000      0x0000000000000000
0x410f20 <ctx+768>:     0x0000000000000000      0x0000000000000000

fixed:

(gdb) x/40xg ctx.uc_mcontext.__reserved
0x410d70 <ctx+464>:     0x0000021046508001      0x0000000000000000
0x410d80 <ctx+480>:     0x0000000000000000      0x0000000000000000
0x410d90 <ctx+496>:     0x0000000000000000      0x0000000000000000
0x410da0 <ctx+512>:     0x0000000000000000      0x0000000000000000
0x410db0 <ctx+528>:     0x0000000000000000      0x0000000000000000
0x410dc0 <ctx+544>:     0x0000000000000000      0x0000000000000000
0x410dd0 <ctx+560>:     0x0000000000000000      0x0000000000000000
0x410de0 <ctx+576>:     0x0000000000000000      0x0000000000000000
0x410df0 <ctx+592>:     0x0000000000000000      0x0000000000000000
0x410e00 <ctx+608>:     0x4020333333333333      0x0000000000000000
0x410e10 <ctx+624>:     0x4022333333333333      0x0000000000000000
0x410e20 <ctx+640>:     0x4024333333333333      0x0000000000000000
0x410e30 <ctx+656>:     0x4026333333333333      0x0000000000000000
0x410e40 <ctx+672>:     0x4028333333333333      0x0000000000000000
0x410e50 <ctx+688>:     0x402a333333333333      0x0000000000000000
0x410e60 <ctx+704>:     0x402c333333333333      0x0000000000000000
0x410e70 <ctx+720>:     0x402e333333333333      0x0000000000000000
0x410e80 <ctx+736>:     0x0000000000000000      0x0000000000000000
0x410e90 <ctx+752>:     0x0000000000000000      0x0000000000000000
0x410ea0 <ctx+768>:     0x0000000000000000      0x0000000000000000

2015-07-06  Szabolcs Nagy  <szabolcs.nagy@arm.com>

	* sysdeps/unix/sysv/linux/aarch64/getcontext.S (__getcontext): Use q
	registers instead of d ones so the layout is kernel abi compatible.
	* sysdeps/unix/sysv/linux/aarch64/setcontext.S (__setcontext): Likewise.
	* sysdeps/unix/sysv/linux/aarch64/swapcontext.S (__swapcontext):
	Likewise.# Please enter the commit message for your changes. Lines starting
2015-07-06 12:46:43 +01:00

101 lines
2.7 KiB
ArmAsm

/* Modify saved context.
Copyright (C) 2009-2015 Free Software Foundation, Inc.
This file is part of the GNU C Library.
The GNU C Library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public License as
published by the Free Software Foundation; either version 2.1 of the
License, or (at your option) any later version.
The GNU C Library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with the GNU C Library; if not, see
<http://www.gnu.org/licenses/>. */
#include <sysdep.h>
#include "ucontext_i.h"
#include "ucontext-internal.h"
/* int swapcontext (ucontext_t *oucp, const ucontext_t *ucp) */
.text
ENTRY(__swapcontext)
/* Set the value returned when swapcontext() returns in this context. */
str xzr, [x0, oX0 + 0 * SZREG]
stp x18, x19, [x0, oX0 + 18 * SZREG]
stp x20, x21, [x0, oX0 + 20 * SZREG]
stp x22, x23, [x0, oX0 + 22 * SZREG]
stp x24, x25, [x0, oX0 + 24 * SZREG]
stp x26, x27, [x0, oX0 + 26 * SZREG]
stp x28, x29, [x0, oX0 + 28 * SZREG]
str x30, [x0, oX0 + 30 * SZREG]
str x30, [x0, oPC]
mov x2, sp
str x2, [x0, oSP]
/* Figure out where to place the first context extension
block. */
add x2, x0, #oEXTENSION
/* Write the context extension fpsimd header. */
mov w3, #(FPSIMD_MAGIC & 0xffff)
movk w3, #(FPSIMD_MAGIC >> 16), lsl #16
str w3, [x2, #oHEAD + oMAGIC]
mov w3, #FPSIMD_CONTEXT_SIZE
str w3, [x2, #oHEAD + oSIZE]
/* Fill in the FP SIMD context. */
add x3, x2, #oV0 + 8 * SZVREG
stp q8, q9, [x3], #2 * SZVREG
stp q10, q11, [x3], #2 * SZVREG
stp q12, q13, [x3], #2 * SZVREG
stp q14, q15, [x3], #2 * SZVREG
add x3, x2, #oFPSR
mrs x4, fpsr
str w4, [x3, #oFPSR - oFPSR]
mrs x4, fpcr
str w4, [x3, #oFPCR - oFPSR]
/* Write the termination context extension header. */
add x2, x2, #FPSIMD_CONTEXT_SIZE
str xzr, [x2, #oHEAD + oMAGIC]
str xzr, [x2, #oHEAD + oSIZE]
/* Preserve ucp. */
mov x21, x1
/* rt_sigprocmask (SIG_SETMASK, &ucp->uc_sigmask, &oucp->uc_sigmask,
_NSIG8) */
/* Grab the signal mask */
/* rt_sigprocmask (SIG_BLOCK, NULL, &ucp->uc_sigmask, _NSIG8) */
add x2, x0, #UCONTEXT_SIGMASK
mov x0, SIG_BLOCK
mov x1, 0
mov x3, _NSIG8
mov x8, SYS_ify (rt_sigprocmask)
svc 0
cbnz x0, 1f
mov x22, x30
mov x0, x21
bl JUMPTARGET (__setcontext)
mov x30, x22
RET
1:
b C_SYMBOL_NAME(__syscall_error)
PSEUDO_END (__swapcontext)
weak_alias (__swapcontext, swapcontext)