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This patch activates C11 atomic builtins by defining USE_ATOMIC_COMPILER_BUILTINS to 1. Note: E.g. in nptl/pthread_key_delete.c if compiled with GCCs 6 and before, an extra stack-frame is generated and the old value is stored on stack before cs instruction but it never loads this value from stack. An unreleased GCC 7 omit those stack operations. E.g. in nptl/pthread_once.c the condition code of cs instruction is evaluated by a sequence of ipm, sra, compare and jump instructions instead of one conditional jump instruction. This also occurs with an unreleased GCC 7. These shortcomings does not really hurt. Nevertheless, the gcc guys are investigating those ones and plan to fix them before GCC 7 release. The atomic_fetch_abc_def C11 builtins are now using load-and-abc instructions on z196 zarch and higher cpus instead of a loop with compare-and-swap instruction. Some of the non-C11 atomic macros from include/atomic.h are now implemented with help of the C11 atomic builtins. The other non-C11 atomic macros are using the macros defined here. ChangeLog: * sysdeps/s390/atomic-machine.h (USE_ATOMIC_COMPILER_BUILTINS): Define to 1. (__arch_compare_and_exchange_val_8_acq, __arch_compare_and_exchange_val_16_acq, __arch_compare_and_exchange_val_32_acq, __arch_compare_and_exchange_val_64_acq): Delete macro. (atomic_compare_and_exchange_val_acq, atomic_compare_and_exchange_val_rel, atomic_compare_and_exchange_bool_acq, catomic_compare_and_exchange_bool_acq, atomic_exchange_acq, atomic_exchange_rel, atomic_exchange_and_add_acq, atomic_exchange_and_add_rel, catomic_exchange_and_add, atomic_or_val, atomic_or, catomic_or, atomic_bit_test_set, atomic_and_val, atomic_and, catomic_and): Define macros with help of C11 atomic builtins.
160 lines
6.3 KiB
C
160 lines
6.3 KiB
C
/* Copyright (C) 2003-2017 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by Martin Schwidefsky <schwidefsky@de.ibm.com>, 2003.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <stdint.h>
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typedef int8_t atomic8_t;
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typedef uint8_t uatomic8_t;
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typedef int_fast8_t atomic_fast8_t;
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typedef uint_fast8_t uatomic_fast8_t;
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typedef int16_t atomic16_t;
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typedef uint16_t uatomic16_t;
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typedef int_fast16_t atomic_fast16_t;
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typedef uint_fast16_t uatomic_fast16_t;
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typedef int32_t atomic32_t;
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typedef uint32_t uatomic32_t;
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typedef int_fast32_t atomic_fast32_t;
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typedef uint_fast32_t uatomic_fast32_t;
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typedef int64_t atomic64_t;
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typedef uint64_t uatomic64_t;
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typedef int_fast64_t atomic_fast64_t;
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typedef uint_fast64_t uatomic_fast64_t;
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typedef intptr_t atomicptr_t;
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typedef uintptr_t uatomicptr_t;
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typedef intmax_t atomic_max_t;
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typedef uintmax_t uatomic_max_t;
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/* Activate all C11 atomic builtins.
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Note:
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E.g. in nptl/pthread_key_delete.c if compiled with GCCs 6 and before,
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an extra stack-frame is generated and the old value is stored on stack
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before cs instruction but it never loads this value from stack.
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An unreleased GCC 7 omit those stack operations.
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E.g. in nptl/pthread_once.c the condition code of cs instruction is
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evaluated by a sequence of ipm, sra, compare and jump instructions instead
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of one conditional jump instruction. This also occurs with an unreleased
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GCC 7.
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The atomic_fetch_abc_def C11 builtins are now using load-and-abc instructions
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on z196 zarch and higher cpus instead of a loop with compare-and-swap
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instruction. */
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#define USE_ATOMIC_COMPILER_BUILTINS 1
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#ifdef __s390x__
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# define __HAVE_64B_ATOMICS 1
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#else
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# define __HAVE_64B_ATOMICS 0
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#endif
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/* Implement some of the non-C11 atomic macros from include/atomic.h
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with help of the C11 atomic builtins. The other non-C11 atomic macros
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are using the macros defined here. */
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/* Atomically store NEWVAL in *MEM if *MEM is equal to OLDVAL.
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Return the old *MEM value. */
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#define atomic_compare_and_exchange_val_acq(mem, newval, oldval) \
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({ __atomic_check_size((mem)); \
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typeof ((__typeof (*(mem))) *(mem)) __atg1_oldval = (oldval); \
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__atomic_compare_exchange_n (mem, (void *) &__atg1_oldval, \
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newval, 1, __ATOMIC_ACQUIRE, \
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__ATOMIC_RELAXED); \
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__atg1_oldval; })
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#define atomic_compare_and_exchange_val_rel(mem, newval, oldval) \
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({ __atomic_check_size((mem)); \
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typeof ((__typeof (*(mem))) *(mem)) __atg1_2_oldval = (oldval); \
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__atomic_compare_exchange_n (mem, (void *) &__atg1_2_oldval, \
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newval, 1, __ATOMIC_RELEASE, \
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__ATOMIC_RELAXED); \
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__atg1_2_oldval; })
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/* Atomically store NEWVAL in *MEM if *MEM is equal to OLDVAL.
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Return zero if *MEM was changed or non-zero if no exchange happened. */
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#define atomic_compare_and_exchange_bool_acq(mem, newval, oldval) \
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({ __atomic_check_size((mem)); \
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typeof ((__typeof (*(mem))) *(mem)) __atg2_oldval = (oldval); \
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!__atomic_compare_exchange_n (mem, (void *) &__atg2_oldval, newval, \
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1, __ATOMIC_ACQUIRE, \
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__ATOMIC_RELAXED); })
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#define catomic_compare_and_exchange_bool_acq(mem, newval, oldval) \
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atomic_compare_and_exchange_bool_acq (mem, newval, oldval)
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/* Store NEWVALUE in *MEM and return the old value. */
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#define atomic_exchange_acq(mem, newvalue) \
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({ __atomic_check_size((mem)); \
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__atomic_exchange_n (mem, newvalue, __ATOMIC_ACQUIRE); })
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#define atomic_exchange_rel(mem, newvalue) \
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({ __atomic_check_size((mem)); \
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__atomic_exchange_n (mem, newvalue, __ATOMIC_RELEASE); })
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/* Add VALUE to *MEM and return the old value of *MEM. */
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/* The gcc builtin uses load-and-add instruction on z196 zarch and higher cpus
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instead of a loop with compare-and-swap instruction. */
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# define atomic_exchange_and_add_acq(mem, operand) \
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({ __atomic_check_size((mem)); \
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__atomic_fetch_add ((mem), (operand), __ATOMIC_ACQUIRE); })
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# define atomic_exchange_and_add_rel(mem, operand) \
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({ __atomic_check_size((mem)); \
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__atomic_fetch_add ((mem), (operand), __ATOMIC_RELEASE); })
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#define catomic_exchange_and_add(mem, value) \
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atomic_exchange_and_add (mem, value)
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/* Atomically *mem |= mask and return the old value of *mem. */
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/* The gcc builtin uses load-and-or instruction on z196 zarch and higher cpus
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instead of a loop with compare-and-swap instruction. */
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#define atomic_or_val(mem, operand) \
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({ __atomic_check_size((mem)); \
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__atomic_fetch_or ((mem), (operand), __ATOMIC_ACQUIRE); })
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/* Atomically *mem |= mask. */
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#define atomic_or(mem, mask) \
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do { \
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atomic_or_val (mem, mask); \
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} while (0)
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#define catomic_or(mem, mask) \
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atomic_or (mem, mask)
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/* Atomically *mem |= 1 << bit and return true if the bit was set in old value
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of *mem. */
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/* The load-and-or instruction is used on z196 zarch and higher cpus
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instead of a loop with compare-and-swap instruction. */
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#define atomic_bit_test_set(mem, bit) \
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({ __typeof (*(mem)) __atg14_old; \
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__typeof (mem) __atg14_memp = (mem); \
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__typeof (*(mem)) __atg14_mask = ((__typeof (*(mem))) 1 << (bit)); \
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__atg14_old = atomic_or_val (__atg14_memp, __atg14_mask); \
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__atg14_old & __atg14_mask; })
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/* Atomically *mem &= mask and return the old value of *mem. */
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/* The gcc builtin uses load-and-and instruction on z196 zarch and higher cpus
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instead of a loop with compare-and-swap instruction. */
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#define atomic_and_val(mem, operand) \
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({ __atomic_check_size((mem)); \
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__atomic_fetch_and ((mem), (operand), __ATOMIC_ACQUIRE); })
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/* Atomically *mem &= mask. */
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#define atomic_and(mem, mask) \
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do { \
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atomic_and_val (mem, mask); \
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} while (0)
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#define catomic_and(mem, mask) \
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atomic_and(mem, mask)
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