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330881763e
Optimizations are: 1. Use the fact that tzcnt(0) -> VEC_SIZE for memchr to save a branch in short string case. 2. Restructure code so that small strings are given the hot path. - This is a net-zero on the benchmark suite but in general makes sense as smaller sizes are far more common. 3. Use more code-size efficient instructions. - tzcnt ... -> bsf ... - vpcmpb $0 ... -> vpcmpeq ... 4. Align labels less aggressively, especially if it doesn't save fetch blocks / causes the basic-block to span extra cache-lines. The optimizations (especially for point 2) make the memchr and rawmemchr code essentially incompatible so split rawmemchr-evex to a new file. Code Size Changes: memchr-evex.S : -107 bytes rawmemchr-evex.S : -53 bytes Net perf changes: Reported as geometric mean of all improvements / regressions from N=10 runs of the benchtests. Value as New Time / Old Time so < 1.0 is improvement and 1.0 is regression. memchr-evex.S : 0.928 rawmemchr-evex.S : 0.986 (Less targets cross cache lines) Full results attached in email. Full check passes on x86-64.
309 lines
7.6 KiB
ArmAsm
309 lines
7.6 KiB
ArmAsm
/* rawmemchr optimized with 256-bit EVEX instructions.
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Copyright (C) 2022 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include <isa-level.h>
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#include <sysdep.h>
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#if ISA_SHOULD_BUILD (4)
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# ifndef VEC_SIZE
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# include "x86-evex256-vecs.h"
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# endif
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# ifndef RAWMEMCHR
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# define RAWMEMCHR __rawmemchr_evex
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# endif
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# define PC_SHIFT_GPR rdi
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# define REG_WIDTH VEC_SIZE
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# define VPTESTN vptestnmb
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# define VPBROADCAST vpbroadcastb
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# define VPMINU vpminub
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# define VPCMP vpcmpb
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# define VPCMPEQ vpcmpeqb
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# define CHAR_SIZE 1
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# include "reg-macros.h"
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/* If not in an RTM and VEC_SIZE != 64 (the VEC_SIZE = 64
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doesn't have VEX encoding), use VEX encoding in loop so we
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can use vpcmpeqb + vptern which is more efficient than the
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EVEX alternative. */
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# if defined USE_IN_RTM || VEC_SIZE == 64
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# undef COND_VZEROUPPER
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# undef VZEROUPPER_RETURN
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# undef VZEROUPPER
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# define COND_VZEROUPPER
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# define VZEROUPPER_RETURN ret
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# define VZEROUPPER
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# define USE_TERN_IN_LOOP 0
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# else
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# define USE_TERN_IN_LOOP 1
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# undef VZEROUPPER
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# define VZEROUPPER vzeroupper
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# endif
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# define CHAR_PER_VEC VEC_SIZE
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# if CHAR_PER_VEC == 64
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# define TAIL_RETURN_LBL first_vec_x2
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# define TAIL_RETURN_OFFSET (CHAR_PER_VEC * 2)
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# define FALLTHROUGH_RETURN_LBL first_vec_x3
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# define FALLTHROUGH_RETURN_OFFSET (CHAR_PER_VEC * 3)
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# else /* !(CHAR_PER_VEC == 64) */
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# define TAIL_RETURN_LBL first_vec_x3
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# define TAIL_RETURN_OFFSET (CHAR_PER_VEC * 3)
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# define FALLTHROUGH_RETURN_LBL first_vec_x2
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# define FALLTHROUGH_RETURN_OFFSET (CHAR_PER_VEC * 2)
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# endif /* !(CHAR_PER_VEC == 64) */
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# define VMATCH VMM(0)
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# define VMATCH_LO VMM_lo(0)
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# define PAGE_SIZE 4096
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.section SECTION(.text), "ax", @progbits
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ENTRY_P2ALIGN (RAWMEMCHR, 6)
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VPBROADCAST %esi, %VMATCH
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/* Check if we may cross page boundary with one vector load. */
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movl %edi, %eax
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andl $(PAGE_SIZE - 1), %eax
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cmpl $(PAGE_SIZE - VEC_SIZE), %eax
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ja L(page_cross)
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VPCMPEQ (%rdi), %VMATCH, %k0
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KMOV %k0, %VRAX
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test %VRAX, %VRAX
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jz L(aligned_more)
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L(first_vec_x0):
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bsf %VRAX, %VRAX
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addq %rdi, %rax
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ret
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.p2align 4,, 4
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L(first_vec_x4):
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bsf %VRAX, %VRAX
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leaq (VEC_SIZE * 4)(%rdi, %rax), %rax
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ret
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/* For VEC_SIZE == 32 we can fit this in aligning bytes so might
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as well place it more locally. For VEC_SIZE == 64 we reuse
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return code at the end of loop's return. */
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# if VEC_SIZE == 32
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.p2align 4,, 4
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L(FALLTHROUGH_RETURN_LBL):
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bsf %VRAX, %VRAX
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leaq (FALLTHROUGH_RETURN_OFFSET)(%rdi, %rax), %rax
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ret
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# endif
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.p2align 4,, 6
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L(page_cross):
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/* eax has lower page-offset bits of rdi so xor will zero them
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out. */
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xorq %rdi, %rax
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VPCMPEQ (PAGE_SIZE - VEC_SIZE)(%rax), %VMATCH, %k0
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KMOV %k0, %VRAX
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/* Shift out out-of-bounds matches. */
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shrx %VRDI, %VRAX, %VRAX
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test %VRAX, %VRAX
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jnz L(first_vec_x0)
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.p2align 4,, 10
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L(aligned_more):
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L(page_cross_continue):
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/* Align pointer. */
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andq $(VEC_SIZE * -1), %rdi
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VPCMPEQ VEC_SIZE(%rdi), %VMATCH, %k0
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KMOV %k0, %VRAX
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test %VRAX, %VRAX
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jnz L(first_vec_x1)
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VPCMPEQ (VEC_SIZE * 2)(%rdi), %VMATCH, %k0
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KMOV %k0, %VRAX
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test %VRAX, %VRAX
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jnz L(first_vec_x2)
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VPCMPEQ (VEC_SIZE * 3)(%rdi), %VMATCH, %k0
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KMOV %k0, %VRAX
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test %VRAX, %VRAX
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jnz L(first_vec_x3)
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VPCMPEQ (VEC_SIZE * 4)(%rdi), %VMATCH, %k0
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KMOV %k0, %VRAX
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test %VRAX, %VRAX
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jnz L(first_vec_x4)
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subq $-(VEC_SIZE * 1), %rdi
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# if VEC_SIZE == 64
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/* Saves code size. No evex512 processor has partial register
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stalls. If that change this can be replaced with `andq
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$-(VEC_SIZE * 4), %rdi`. */
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xorb %dil, %dil
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# else
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andq $-(VEC_SIZE * 4), %rdi
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# endif
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# if USE_TERN_IN_LOOP
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/* copy VMATCH to low ymm so we can use vpcmpeq which is not
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encodable with EVEX registers. NB: this is VEC_SIZE == 32
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only as there is no way to encode vpcmpeq with zmm0-15. */
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vmovdqa64 %VMATCH, %VMATCH_LO
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# endif
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.p2align 4
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L(loop_4x_vec):
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/* Two versions of the loop. One that does not require
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vzeroupper by not using ymm0-15 and another does that
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require vzeroupper because it uses ymm0-15. The reason why
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ymm0-15 is used at all is because there is no EVEX encoding
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vpcmpeq and with vpcmpeq this loop can be performed more
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efficiently. The non-vzeroupper version is safe for RTM
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while the vzeroupper version should be prefered if RTM are
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not supported. Which loop version we use is determined by
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USE_TERN_IN_LOOP. */
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# if USE_TERN_IN_LOOP
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/* Since vptern can only take 3x vectors fastest to do 1 vec
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seperately with EVEX vpcmp. */
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VPCMPEQ (VEC_SIZE * 4)(%rdi), %VMATCH, %k1
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/* Compare 3x with vpcmpeq and or them all together with vptern.
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*/
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VPCMPEQ (VEC_SIZE * 5)(%rdi), %VMATCH_LO, %VMM_lo(2)
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subq $(VEC_SIZE * -4), %rdi
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VPCMPEQ (VEC_SIZE * 2)(%rdi), %VMATCH_LO, %VMM_lo(3)
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VPCMPEQ (VEC_SIZE * 3)(%rdi), %VMATCH_LO, %VMM_lo(4)
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/* 254 is mask for oring VEC_lo(2), VEC_lo(3), VEC_lo(4) into
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VEC_lo(4). */
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vpternlogd $254, %VMM_lo(2), %VMM_lo(3), %VMM_lo(4)
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vpmovmskb %VMM_lo(4), %VRCX
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KMOV %k1, %eax
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/* NB: rax has match from first VEC and rcx has matches from
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VEC 2-4. If rax is non-zero we will return that match. If
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rax is zero adding won't disturb the bits in rcx. */
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add %rax, %rcx
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# else
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/* Loop version that uses EVEX encoding. */
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VPCMP $4, (VEC_SIZE * 4)(%rdi), %VMATCH, %k1
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vpxorq (VEC_SIZE * 5)(%rdi), %VMATCH, %VMM(2)
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vpxorq (VEC_SIZE * 6)(%rdi), %VMATCH, %VMM(3)
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VPCMPEQ (VEC_SIZE * 7)(%rdi), %VMATCH, %k3
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VPMINU %VMM(2), %VMM(3), %VMM(3){%k1}{z}
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VPTESTN %VMM(3), %VMM(3), %k2
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subq $(VEC_SIZE * -4), %rdi
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KORTEST %k2, %k3
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# endif
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jz L(loop_4x_vec)
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# if USE_TERN_IN_LOOP
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test %VRAX, %VRAX
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# else
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KMOV %k1, %VRAX
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inc %VRAX
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# endif
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jnz L(last_vec_x0)
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# if USE_TERN_IN_LOOP
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vpmovmskb %VMM_lo(2), %VRAX
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# else
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VPTESTN %VMM(2), %VMM(2), %k1
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KMOV %k1, %VRAX
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# endif
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test %VRAX, %VRAX
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jnz L(last_vec_x1)
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# if USE_TERN_IN_LOOP
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vpmovmskb %VMM_lo(3), %VRAX
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# else
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KMOV %k2, %VRAX
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# endif
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/* No longer need any of the lo vecs (ymm0-15) so vzeroupper
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(only if used VEX encoded loop). */
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COND_VZEROUPPER
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/* Seperate logic for VEC_SIZE == 64 and VEC_SIZE == 32 for
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returning last 2x VEC. For VEC_SIZE == 64 we test each VEC
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individually, for VEC_SIZE == 32 we combine them in a single
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64-bit GPR. */
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# if CHAR_PER_VEC == 64
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# if USE_TERN_IN_LOOP
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# error "Unsupported"
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# endif
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/* If CHAR_PER_VEC == 64 we can't combine the last two VEC. */
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test %VRAX, %VRAX
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jnz L(first_vec_x2)
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KMOV %k3, %VRAX
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L(FALLTHROUGH_RETURN_LBL):
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# else
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/* CHAR_PER_VEC <= 32 so we can combine the results from the
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last 2x VEC. */
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# if !USE_TERN_IN_LOOP
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KMOV %k3, %VRCX
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# endif
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salq $CHAR_PER_VEC, %rcx
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addq %rcx, %rax
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# endif
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bsf %rax, %rax
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leaq (FALLTHROUGH_RETURN_OFFSET)(%rdi, %rax), %rax
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ret
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.p2align 4,, 8
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L(TAIL_RETURN_LBL):
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bsf %rax, %rax
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leaq (TAIL_RETURN_OFFSET)(%rdi, %rax), %rax
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ret
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.p2align 4,, 8
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L(last_vec_x1):
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COND_VZEROUPPER
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L(first_vec_x1):
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bsf %VRAX, %VRAX
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leaq (VEC_SIZE * 1)(%rdi, %rax), %rax
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ret
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.p2align 4,, 8
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L(last_vec_x0):
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COND_VZEROUPPER
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bsf %VRAX, %VRAX
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addq %rdi, %rax
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ret
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END (RAWMEMCHR)
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#endif
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