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a54e8d33d1
2003-02-08 kaz Kojima <kkojima@rr.iij4u.or.jp> * sysdeps/sh/Makefile: New file. * sysdeps/sh/bits/atomic.h: New file. * sysdeps/sh/pthread_spin_init.c: New file. * sysdeps/sh/pthread_spin_lock.c: New file. * sysdeps/sh/pthread_spin_trylock.S: New file. * sysdeps/sh/pthread_spin_unlock.S: New file. * sysdeps/sh/pthreaddef.h: New file. * sysdeps/sh/tcb-offsets.sym: New file. * sysdeps/sh/td_ta_map_lwp2thr.c: New file. * sysdeps/sh/tls.h: New file. * sysdeps/unix/sysv/linux/sh/bits/pthreadtypes.h: New file. * sysdeps/unix/sysv/linux/sh/bits/semaphore.h: New file. * sysdeps/unix/sysv/linux/sh/createthread.c: New file. * sysdeps/unix/sysv/linux/sh/fork.c: New file. * sysdeps/unix/sysv/linux/sh/libc-lowlevellock.S: New file. * sysdeps/unix/sysv/linux/sh/libc-lowlevelmutex.S: New file. * sysdeps/unix/sysv/linux/sh/lowlevel-atomic.h: New file. * sysdeps/unix/sysv/linux/sh/lowlevelcond.h: New file. * sysdeps/unix/sysv/linux/sh/lowlevellock.S: New file. * sysdeps/unix/sysv/linux/sh/lowlevellock.h: New file. * sysdeps/unix/sysv/linux/sh/lowlevelmutex.S: New file. * sysdeps/unix/sysv/linux/sh/lowlevelrwlock.h: New file. * sysdeps/unix/sysv/linux/sh/pt-initfini.c: New file. * sysdeps/unix/sysv/linux/sh/pt-vfork.S: New file. * sysdeps/unix/sysv/linux/sh/pthread_barrier_wait.S: New file. * sysdeps/unix/sysv/linux/sh/pthread_cond_broadcast.S: New file. * sysdeps/unix/sysv/linux/sh/pthread_cond_signal.S: New file. * sysdeps/unix/sysv/linux/sh/pthread_cond_timedwait.S: New file. * sysdeps/unix/sysv/linux/sh/pthread_cond_wait.S: New file. * sysdeps/unix/sysv/linux/sh/pthread_once.S: New file. * sysdeps/unix/sysv/linux/sh/pthread_rwlock_rdlock.S: New file. * sysdeps/unix/sysv/linux/sh/pthread_rwlock_timedrdlock.S: New file. * sysdeps/unix/sysv/linux/sh/pthread_rwlock_timedwrlock.S: New file. * sysdeps/unix/sysv/linux/sh/pthread_rwlock_unlock.S: New file. * sysdeps/unix/sysv/linux/sh/pthread_rwlock_wrlock.S: New file. * sysdeps/unix/sysv/linux/sh/sem_post.S: New file. * sysdeps/unix/sysv/linux/sh/sem_timedwait.S: New file. * sysdeps/unix/sysv/linux/sh/sem_trywait.S: New file. * sysdeps/unix/sysv/linux/sh/sem_wait.S: New file. * sysdeps/unix/sysv/linux/sh/sysdep-cancel.h: New file.
406 lines
10 KiB
C
406 lines
10 KiB
C
/* Copyright (C) 2003 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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#include <stdint.h>
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typedef int8_t atomic8_t;
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typedef uint8_t uatomic8_t;
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typedef int_fast8_t atomic_fast8_t;
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typedef uint_fast8_t uatomic_fast8_t;
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typedef int16_t atomic16_t;
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typedef uint16_t uatomic16_t;
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typedef int_fast16_t atomic_fast16_t;
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typedef uint_fast16_t uatomic_fast16_t;
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typedef int32_t atomic32_t;
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typedef uint32_t uatomic32_t;
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typedef int_fast32_t atomic_fast32_t;
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typedef uint_fast32_t uatomic_fast32_t;
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typedef int64_t atomic64_t;
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typedef uint64_t uatomic64_t;
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typedef int_fast64_t atomic_fast64_t;
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typedef uint_fast64_t uatomic_fast64_t;
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typedef intptr_t atomicptr_t;
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typedef uintptr_t uatomicptr_t;
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typedef intmax_t atomic_max_t;
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typedef uintmax_t uatomic_max_t;
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#define __arch_compare_and_exchange_8_acq(mem, newval, oldval) \
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({ unsigned char __result; \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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nop\n\
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mov r15,r1\n\
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mov #-8,r15\n\
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0: mov.b @%1,r2\n\
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cmp/eq r2,%3\n\
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bf 1f\n\
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mov.b %2,@%1\n\
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1: mov r1,r15\n\
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mov #-1,%0\n\
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negc %0,%0"\
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: "=r" (__result) : "r" (mem), "r" (newval), "r" (oldval) \
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: "r0", "r1", "r2", "t", "memory"); \
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__result; })
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#define __arch_compare_and_exchange_16_acq(mem, newval, oldval) \
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({ unsigned char __result; \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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nop\n\
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mov r15,r1\n\
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mov #-8,r15\n\
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0: mov.w @%1,r2\n\
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cmp/eq r2,%3\n\
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bf 1f\n\
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mov.w %2,@%1\n\
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1: mov r1,r15\n\
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mov #-1,%0\n\
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negc %0,%0"\
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: "=r" (__result) : "r" (mem), "r" (newval), "r" (oldval) \
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: "r0", "r1", "r2", "t", "memory"); \
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__result; })
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#define __arch_compare_and_exchange_32_acq(mem, newval, oldval) \
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({ unsigned char __result; \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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nop\n\
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mov r15,r1\n\
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mov #-8,r15\n\
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0: mov.l @%1,r2\n\
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cmp/eq r2,%3\n\
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bf 1f\n\
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mov.l %2,@%1\n\
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1: mov r1,r15\n\
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mov #-1,%0\n\
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negc %0,%0"\
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: "=r" (__result) : "r" (mem), "r" (newval), "r" (oldval) \
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: "r0", "r1", "r2", "t", "memory"); \
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__result; })
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/* XXX We do not really need 64-bit compare-and-exchange. At least
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not in the moment. Using it would mean causing portability
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problems since not many other 32-bit architectures have support for
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such an operation. So don't define any code for now. */
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# define __arch_compare_and_exchange_64_acq(mem, newval, oldval) \
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(abort (), 0)
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#define atomic_exchange_and_add(mem, value) \
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({ __typeof (*mem) __result; \
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if (sizeof (*mem) == 1) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.b @%2,%0\n\
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add %0,%1\n\
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mov.b %1,@%2\n\
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1: mov r1,r15"\
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: "=&r" (__result), "=&r" (value) : "r" (mem), "1" (value) \
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: "r0", "r1", "memory"); \
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else if (sizeof (*mem) == 2) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.w @%2,%0\n\
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add %0,%1\n\
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mov.w %1,@%2\n\
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1: mov r1,r15"\
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: "=&r" (__result), "=&r" (value) : "r" (mem), "1" (value) \
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: "r0", "r1", "memory"); \
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else if (sizeof (*mem) == 4) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.l @%2,%0\n\
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add %0,%1\n\
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mov.l %1,@%2\n\
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1: mov r1,r15"\
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: "=&r" (__result), "=&r" (value) : "r" (mem), "1" (value) \
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: "r0", "r1", "memory"); \
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else \
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{ \
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__typeof (value) addval = (value); \
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__typeof (*mem) oldval; \
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__typeof (mem) memp = (mem); \
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do \
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__result = (oldval = *memp) + addval; \
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while (!__arch_compare_and_exchange_64_acq (memp, __result, oldval));\
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(void) addval; \
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} \
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__result; })
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#define atomic_add(mem, value) \
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(void) ({ if (sizeof (*mem) == 1) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.b @%1,r2\n\
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add r2,%0\n\
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mov.b %0,@%1\n\
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1: mov r1,r15"\
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: "=&r" (value) : "r" (mem), "0" (value) \
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: "r0", "r1", "r2", "memory"); \
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else if (sizeof (*mem) == 2) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.w @%1,r2\n\
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add r2,%0\n\
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mov.w %0,@%1\n\
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1: mov r1,r15"\
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: "=&r" (value) : "r" (mem), "0" (value) \
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: "r0", "r1", "r2", "memory"); \
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else if (sizeof (*mem) == 4) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.l @%1,r2\n\
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add r2,%0\n\
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mov.l %0,@%1\n\
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1: mov r1,r15"\
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: "=&r" (value) : "r" (mem), "0" (value) \
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: "r0", "r1", "r2", "memory"); \
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else \
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{ \
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__typeof (value) addval = (value); \
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__typeof (*mem) oldval; \
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__typeof (mem) memp = (mem); \
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do \
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oldval = *memp; \
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while (! __arch_compare_and_exchange_64_acq (memp, \
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oldval + addval, \
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oldval)); \
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(void) addval; \
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} \
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})
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#define atomic_add_negative(mem, value) \
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({ unsigned char __result; \
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if (sizeof (*mem) == 1) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.b @%2,r2\n\
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add r2,%1\n\
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mov.b %1,@%2\n\
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1: mov r1,r15\n\
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shal %1\n\
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movt %0"\
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: "=r" (__result), "=&r" (value) : "r" (mem), "1" (value) \
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: "r0", "r1", "r2", "t", "memory"); \
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else if (sizeof (*mem) == 2) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.w @%2,r2\n\
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add r2,%1\n\
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mov.w %1,@%2\n\
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1: mov r1,r15\n\
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shal %1\n\
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movt %0"\
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: "=r" (__result), "=&r" (value) : "r" (mem), "1" (value) \
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: "r0", "r1", "r2", "t", "memory"); \
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else if (sizeof (*mem) == 4) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.l @%2,r2\n\
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add r2,%1\n\
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mov.l %1,@%2\n\
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1: mov r1,r15\n\
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shal %1\n\
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movt %0"\
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: "=r" (__result), "=&r" (value) : "r" (mem), "1" (value) \
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: "r0", "r1", "r2", "t", "memory"); \
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else \
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abort (); \
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__result; })
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#define atomic_add_zero(mem, value) \
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({ unsigned char __result; \
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if (sizeof (*mem) == 1) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.b @%2,r2\n\
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add r2,%1\n\
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mov.b %1,@%2\n\
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1: mov r1,r15\n\
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tst %1,%1\n\
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movt %0"\
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: "=r" (__result), "=&r" (value) : "r" (mem), "1" (value) \
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: "r0", "r1", "r2", "t", "memory"); \
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else if (sizeof (*mem) == 2) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.w @%2,r2\n\
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add r2,%1\n\
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mov.w %1,@%2\n\
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1: mov r1,r15\n\
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tst %1,%1\n\
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movt %0"\
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: "=r" (__result), "=&r" (value) : "r" (mem), "1" (value) \
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: "r0", "r1", "r2", "t", "memory"); \
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else if (sizeof (*mem) == 4) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.l @%2,r2\n\
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add r2,%1\n\
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mov.l %1,@%2\n\
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1: mov r1,r15\n\
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tst %1,%1\n\
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movt %0"\
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: "=r" (__result), "=&r" (value) : "r" (mem), "1" (value) \
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: "r0", "r1", "r2", "t", "memory"); \
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else \
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abort (); \
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__result; })
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#define atomic_increment_and_test(mem) atomic_add_zero((mem), 1)
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#define atomic_decrement_and_test(mem) atomic_add_zero((mem), -1)
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#define atomic_bit_set(mem, bit) \
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(void) ({ unsigned int __mask = 1 << (bit); \
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if (sizeof (*mem) == 1) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.b @%0,r2\n\
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or %1,r2\n\
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mov.b r2,@%0\n\
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1: mov r1,r15"\
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: : "r" (mem), "r" (__mask) \
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: "r0", "r1", "r2", "memory"); \
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else if (sizeof (*mem) == 2) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.w @%0,r2\n\
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or %1,r2\n\
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mov.w r2,@%0\n\
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1: mov r1,r15"\
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: : "r" (mem), "r" (__mask) \
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: "r0", "r1", "r2", "memory"); \
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else if (sizeof (*mem) == 4) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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mov r15,r1\n\
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mov #-6,r15\n\
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0: mov.l @%0,r2\n\
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or %1,r2\n\
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mov.l r2,@%0\n\
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1: mov r1,r15"\
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: : "r" (mem), "r" (__mask) \
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: "r0", "r1", "r2", "memory"); \
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else \
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abort (); \
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})
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#define atomic_bit_test_set(mem, bit) \
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({ unsigned int __mask = 1 << (bit); \
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unsigned int __result = __mask; \
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if (sizeof (*mem) == 1) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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nop\n\
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mov r15,r1\n\
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mov #-8,r15\n\
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0: mov.b @%2,r2\n\
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or r2,%1\n\
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and r2,%0\n\
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mov.b %1,@%2\n\
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1: mov r1,r15"\
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: "=&r" (__result), "=&r" (__mask) \
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: "r" (mem), "0" (__result), "1" (__mask) \
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: "r0", "r1", "r2", "memory"); \
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else if (sizeof (*mem) == 2) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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nop\n\
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mov r15,r1\n\
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mov #-8,r15\n\
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0: mov.w @%2,r2\n\
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or r2,%1\n\
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and r2,%0\n\
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mov.w %1,@%2\n\
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1: mov r1,r15"\
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: "=&r" (__result), "=&r" (__mask) \
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: "r" (mem), "0" (__result), "1" (__mask) \
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: "r0", "r1", "r2", "memory"); \
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else if (sizeof (*mem) == 4) \
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__asm __volatile ("\
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.align 2\n\
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mova 1f,r0\n\
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nop\n\
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mov r15,r1\n\
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mov #-8,r15\n\
|
|
0: mov.l @%2,r2\n\
|
|
or r2,%1\n\
|
|
and r2,%0\n\
|
|
mov.l %1,@%2\n\
|
|
1: mov r1,r15"\
|
|
: "=&r" (__result), "=&r" (__mask) \
|
|
: "r" (mem), "0" (__result), "1" (__mask) \
|
|
: "r0", "r1", "r2", "memory"); \
|
|
else \
|
|
abort (); \
|
|
__result; })
|