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https://sourceware.org/git/glibc.git
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5a82c74822
Also, change sources.redhat.com to sourceware.org.
This patch was automatically generated by running the following shell
script, which uses GNU sed, and which avoids modifying files imported
from upstream:
sed -ri '
s,(http|ftp)(://(.*\.)?(gnu|fsf|sourceware)\.org($|[^.]|\.[^a-z])),https\2,g
s,(http|ftp)(://(.*\.)?)sources\.redhat\.com($|[^.]|\.[^a-z]),https\2sourceware.org\4,g
' \
$(find $(git ls-files) -prune -type f \
! -name '*.po' \
! -name 'ChangeLog*' \
! -path COPYING ! -path COPYING.LIB \
! -path manual/fdl-1.3.texi ! -path manual/lgpl-2.1.texi \
! -path manual/texinfo.tex ! -path scripts/config.guess \
! -path scripts/config.sub ! -path scripts/install-sh \
! -path scripts/mkinstalldirs ! -path scripts/move-if-change \
! -path INSTALL ! -path locale/programs/charmap-kw.h \
! -path po/libc.pot ! -path sysdeps/gnu/errlist.c \
! '(' -name configure \
-execdir test -f configure.ac -o -f configure.in ';' ')' \
! '(' -name preconfigure \
-execdir test -f preconfigure.ac ';' ')' \
-print)
and then by running 'make dist-prepare' to regenerate files built
from the altered files, and then executing the following to cleanup:
chmod a+x sysdeps/unix/sysv/linux/riscv/configure
# Omit irrelevant whitespace and comment-only changes,
# perhaps from a slightly-different Autoconf version.
git checkout -f \
sysdeps/csky/configure \
sysdeps/hppa/configure \
sysdeps/riscv/configure \
sysdeps/unix/sysv/linux/csky/configure
# Omit changes that caused a pre-commit check to fail like this:
# remote: *** error: sysdeps/powerpc/powerpc64/ppc-mcount.S: trailing lines
git checkout -f \
sysdeps/powerpc/powerpc64/ppc-mcount.S \
sysdeps/unix/sysv/linux/s390/s390-64/syscall.S
# Omit change that caused a pre-commit check to fail like this:
# remote: *** error: sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S: last line does not end in newline
git checkout -f sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S
91 lines
2.9 KiB
C
91 lines
2.9 KiB
C
/* Copyright (C) 1996-2019 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public License as
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published by the Free Software Foundation; either version 2.1 of the
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License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#ifndef _AARCH64_FPU_CONTROL_H
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#define _AARCH64_FPU_CONTROL_H
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#include <features.h>
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/* Macros for accessing the FPCR and FPSR. */
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#if __GNUC_PREREQ (6,0)
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# define _FPU_GETCW(fpcr) (fpcr = __builtin_aarch64_get_fpcr ())
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# define _FPU_SETCW(fpcr) __builtin_aarch64_set_fpcr (fpcr)
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# define _FPU_GETFPSR(fpsr) (fpsr = __builtin_aarch64_get_fpsr ())
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# define _FPU_SETFPSR(fpsr) __builtin_aarch64_set_fpsr (fpsr)
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#else
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# define _FPU_GETCW(fpcr) \
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__asm__ __volatile__ ("mrs %0, fpcr" : "=r" (fpcr))
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# define _FPU_SETCW(fpcr) \
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__asm__ __volatile__ ("msr fpcr, %0" : : "r" (fpcr))
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# define _FPU_GETFPSR(fpsr) \
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__asm__ __volatile__ ("mrs %0, fpsr" : "=r" (fpsr))
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# define _FPU_SETFPSR(fpsr) \
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__asm__ __volatile__ ("msr fpsr, %0" : : "r" (fpsr))
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#endif
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/* Reserved bits should be preserved when modifying register
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contents. These two masks indicate which bits in each of FPCR and
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FPSR should not be changed. */
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#define _FPU_RESERVED 0xfe0fe0ff
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#define _FPU_FPSR_RESERVED 0x0fffffe0
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#define _FPU_DEFAULT 0x00000000
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#define _FPU_FPSR_DEFAULT 0x00000000
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/* Layout of FPCR and FPSR:
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| | | | | | | |
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0 0 0 0 1 1 1 0 0 0 0 0 1 0 0 0 1 1 1 0 0 0 0 0 1 1 1 0 0 0 0 0
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s s s s s s s s s s s
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c c c c c c c c c c c c
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N Z C V Q A D F R R S S S L L L I U U I U O D I I U U I U O D I
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C H N Z M M T T B E E E D N N X F F Z O D N N X F F Z O
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P O O R R Z N N N E K K E E E E E C K K C C C C C
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D D I I P
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E E D D
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E E
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*/
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#define _FPU_FPCR_RM_MASK 0xc00000
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#define _FPU_FPCR_MASK_IXE 0x1000
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#define _FPU_FPCR_MASK_UFE 0x0800
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#define _FPU_FPCR_MASK_OFE 0x0400
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#define _FPU_FPCR_MASK_DZE 0x0200
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#define _FPU_FPCR_MASK_IOE 0x0100
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#define _FPU_FPCR_IEEE \
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(_FPU_DEFAULT | _FPU_FPCR_MASK_IXE \
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| _FPU_FPCR_MASK_UFE | _FPU_FPCR_MASK_OFE \
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| _FPU_FPCR_MASK_DZE | _FPU_FPCR_MASK_IOE)
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#define _FPU_FPSR_IEEE 0
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typedef unsigned int fpu_control_t;
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typedef unsigned int fpu_fpsr_t;
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/* Default control word set at startup. */
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extern fpu_control_t __fpu_control;
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#endif
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