mirror of
https://sourceware.org/git/glibc.git
synced 2025-01-13 20:50:08 +00:00
5d96fe8c0d
On s390, the DXC(data-exception-code)-byte in FPC(floating-point-control)-
register contains a code of the last occured exception.
If bits 6 and 7 of DXC-byte are zero, the bits 0-5 correspond to the
ieee-exception flag bits.
The current implementation always uses these bits as ieee-exception flag bits.
fetestexcept() reports any exception after the first usage of a
vector-instruction in a process, because it raises an "vector instruction
exception" with DXC-code 0xFE.
This patch fixes the handling of the DXC-byte. The DXC-Byte is only handled
if bits 6 and 7 are zero.
The #define _FPU_RESERVED is extended by the DXC-Byte.
Otherwise the tests math/test-fpucw-static and math/test-fpucw-ieee-static
fails, because DXC-Byte contains the vector instruction exception when reaching
main(). This exception was triggered by strrchr() call in __init_misc().
__init_misc() is called after __setfpucw () in __libc_init_first().
The field __ieee_instruction_pointer in struct fenv_t is renamed to __unused
because it is a relict from commit "Remove PTRACE_PEEKUSER"
(
|
||
---|---|---|
.. | ||
bits | ||
fpu | ||
nptl | ||
s390-32 | ||
s390-64 | ||
abort-instr.h | ||
asm-syntax.h | ||
configure | ||
configure.ac | ||
dl-irel.h | ||
dl-procinfo.c | ||
dl-procinfo.h | ||
dl-tls.h | ||
ffs.c | ||
gccframe.h | ||
gmp-mparam.h | ||
Implies | ||
jmpbuf-offsets.h | ||
jmpbuf-unwind.h | ||
ldsodefs.h | ||
libc-tls.c | ||
longjmp.c | ||
machine-gmon.h | ||
memusage.h | ||
preconfigure | ||
sotruss-lib.c | ||
stackinfo.h | ||
Versions |