mirror of
https://sourceware.org/git/glibc.git
synced 2024-11-27 07:20:11 +00:00
91c03c5389
This patch adds CFI to the sysdeps/i386/fpu/ implementations of ceil, floor and trunc functions, for consistency with other x86 .S files in glibc which have CFI for stack adjustments. Tested x86. [BZ #16681] * sysdeps/i386/fpu/s_ceil.S (__ceil): Add CFI. * sysdeps/i386/fpu/s_ceilf.S (__ceilf): Likewise. * sysdeps/i386/fpu/s_ceill.S (__ceill): Likewise. * sysdeps/i386/fpu/s_floor.S (__floor): Likewise. * sysdeps/i386/fpu/s_floorf.S (__floorf): Likewise. * sysdeps/i386/fpu/s_floorl.S (__floorl): Likewise. * sysdeps/i386/fpu/s_trunc.S (__trunc): Likewise. * sysdeps/i386/fpu/s_truncf.S (__truncf): Likewise. * sysdeps/i386/fpu/s_truncl.S (__truncl): Likewise.
35 lines
759 B
ArmAsm
35 lines
759 B
ArmAsm
/*
|
|
* Written by J.T. Conklin <jtc@netbsd.org>.
|
|
* Public domain.
|
|
*/
|
|
|
|
#include <machine/asm.h>
|
|
|
|
RCSID("$NetBSD: s_ceilf.S,v 1.3 1995/05/08 23:52:44 jtc Exp $")
|
|
|
|
ENTRY(__ceilf)
|
|
flds 4(%esp)
|
|
subl $8,%esp
|
|
cfi_adjust_cfa_offset (8)
|
|
|
|
fstcw 4(%esp) /* store fpu control word */
|
|
|
|
/* We use here %edx although only the low 1 bits are defined.
|
|
But none of the operations should care and they are faster
|
|
than the 16 bit operations. */
|
|
movl $0x0800,%edx /* round towards +oo */
|
|
orl 4(%esp),%edx
|
|
andl $0xfbff,%edx
|
|
movl %edx,(%esp)
|
|
fldcw (%esp) /* load modified control word */
|
|
|
|
frndint /* round */
|
|
|
|
fldcw 4(%esp) /* restore original control word */
|
|
|
|
addl $8,%esp
|
|
cfi_adjust_cfa_offset (-8)
|
|
ret
|
|
END (__ceilf)
|
|
weak_alias (__ceilf, ceilf)
|