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5fe2a126d1
* sysdeps/x86_64/multiarch/init-arch.h (bit_AVX512F_Usable,
bit_AVX512DQ_Usable, bit_Opmask_state, bit_ZMM0_15_state,
bit_ZMM16_31_state): New macro.
* sysdeps/x86_64/multiarch/init-arch.c (__init_cpu_features):
Check and set bit_AVX512F_Usable, bit_AVX512DQ_Usable.
224 lines
6.7 KiB
C
224 lines
6.7 KiB
C
/* Initialize CPU feature data.
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This file is part of the GNU C Library.
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Copyright (C) 2008-2015 Free Software Foundation, Inc.
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Contributed by Ulrich Drepper <drepper@redhat.com>.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <atomic.h>
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#include <cpuid.h>
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#include "init-arch.h"
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struct cpu_features __cpu_features attribute_hidden;
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static void
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get_common_indeces (unsigned int *family, unsigned int *model)
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{
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__cpuid (1, __cpu_features.cpuid[COMMON_CPUID_INDEX_1].eax,
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__cpu_features.cpuid[COMMON_CPUID_INDEX_1].ebx,
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__cpu_features.cpuid[COMMON_CPUID_INDEX_1].ecx,
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__cpu_features.cpuid[COMMON_CPUID_INDEX_1].edx);
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unsigned int eax = __cpu_features.cpuid[COMMON_CPUID_INDEX_1].eax;
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*family = (eax >> 8) & 0x0f;
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*model = (eax >> 4) & 0x0f;
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}
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void
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__init_cpu_features (void)
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{
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unsigned int ebx;
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unsigned int ecx;
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unsigned int edx;
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unsigned int family = 0;
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unsigned int model = 0;
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enum cpu_features_kind kind;
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__cpuid (0, __cpu_features.max_cpuid, ebx, ecx, edx);
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/* This spells out "GenuineIntel". */
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if (ebx == 0x756e6547 && ecx == 0x6c65746e && edx == 0x49656e69)
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{
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kind = arch_kind_intel;
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get_common_indeces (&family, &model);
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unsigned int eax = __cpu_features.cpuid[COMMON_CPUID_INDEX_1].eax;
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unsigned int extended_family = (eax >> 20) & 0xff;
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unsigned int extended_model = (eax >> 12) & 0xf0;
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if (family == 0x0f)
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{
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family += extended_family;
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model += extended_model;
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}
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else if (family == 0x06)
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{
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ecx = __cpu_features.cpuid[COMMON_CPUID_INDEX_1].ecx;
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model += extended_model;
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switch (model)
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{
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case 0x1c:
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case 0x26:
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/* BSF is slow on Atom. */
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__cpu_features.feature[index_Slow_BSF] |= bit_Slow_BSF;
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break;
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case 0x37:
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case 0x4a:
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case 0x4d:
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case 0x5a:
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case 0x5d:
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/* Unaligned load versions are faster than SSSE3
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on Silvermont. */
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#if index_Fast_Unaligned_Load != index_Prefer_PMINUB_for_stringop
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# error index_Fast_Unaligned_Load != index_Prefer_PMINUB_for_stringop
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#endif
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#if index_Fast_Unaligned_Load != index_Slow_SSE4_2
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# error index_Fast_Unaligned_Load != index_Slow_SSE4_2
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#endif
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__cpu_features.feature[index_Fast_Unaligned_Load]
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|= (bit_Fast_Unaligned_Load
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| bit_Prefer_PMINUB_for_stringop
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| bit_Slow_SSE4_2);
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break;
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default:
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/* Unknown family 0x06 processors. Assuming this is one
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of Core i3/i5/i7 processors if AVX is available. */
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if ((ecx & bit_AVX) == 0)
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break;
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case 0x1a:
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case 0x1e:
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case 0x1f:
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case 0x25:
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case 0x2c:
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case 0x2e:
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case 0x2f:
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/* Rep string instructions, copy backward, unaligned loads
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and pminub are fast on Intel Core i3, i5 and i7. */
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#if index_Fast_Rep_String != index_Fast_Copy_Backward
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# error index_Fast_Rep_String != index_Fast_Copy_Backward
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#endif
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#if index_Fast_Rep_String != index_Fast_Unaligned_Load
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# error index_Fast_Rep_String != index_Fast_Unaligned_Load
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#endif
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#if index_Fast_Rep_String != index_Prefer_PMINUB_for_stringop
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# error index_Fast_Rep_String != index_Prefer_PMINUB_for_stringop
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#endif
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__cpu_features.feature[index_Fast_Rep_String]
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|= (bit_Fast_Rep_String
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| bit_Fast_Copy_Backward
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| bit_Fast_Unaligned_Load
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| bit_Prefer_PMINUB_for_stringop);
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break;
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}
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}
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}
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/* This spells out "AuthenticAMD". */
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else if (ebx == 0x68747541 && ecx == 0x444d4163 && edx == 0x69746e65)
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{
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kind = arch_kind_amd;
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get_common_indeces (&family, &model);
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ecx = __cpu_features.cpuid[COMMON_CPUID_INDEX_1].ecx;
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unsigned int eax;
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__cpuid (0x80000000, eax, ebx, ecx, edx);
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if (eax >= 0x80000001)
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__cpuid (0x80000001,
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__cpu_features.cpuid[COMMON_CPUID_INDEX_80000001].eax,
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__cpu_features.cpuid[COMMON_CPUID_INDEX_80000001].ebx,
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__cpu_features.cpuid[COMMON_CPUID_INDEX_80000001].ecx,
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__cpu_features.cpuid[COMMON_CPUID_INDEX_80000001].edx);
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}
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else
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kind = arch_kind_other;
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if (__cpu_features.max_cpuid >= 7)
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__cpuid_count (7, 0,
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__cpu_features.cpuid[COMMON_CPUID_INDEX_7].eax,
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__cpu_features.cpuid[COMMON_CPUID_INDEX_7].ebx,
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__cpu_features.cpuid[COMMON_CPUID_INDEX_7].ecx,
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__cpu_features.cpuid[COMMON_CPUID_INDEX_7].edx);
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/* Can we call xgetbv? */
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if (CPUID_OSXSAVE)
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{
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unsigned int xcrlow;
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unsigned int xcrhigh;
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asm ("xgetbv" : "=a" (xcrlow), "=d" (xcrhigh) : "c" (0));
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/* Is YMM and XMM state usable? */
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if ((xcrlow & (bit_YMM_state | bit_XMM_state)) ==
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(bit_YMM_state | bit_XMM_state))
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{
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/* Determine if AVX is usable. */
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if (CPUID_AVX)
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__cpu_features.feature[index_AVX_Usable] |= bit_AVX_Usable;
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#if index_AVX2_Usable != index_AVX_Fast_Unaligned_Load
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# error index_AVX2_Usable != index_AVX_Fast_Unaligned_Load
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#endif
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/* Determine if AVX2 is usable. Unaligned load with 256-bit
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AVX registers are faster on processors with AVX2. */
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if (CPUID_AVX2)
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__cpu_features.feature[index_AVX2_Usable]
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|= bit_AVX2_Usable | bit_AVX_Fast_Unaligned_Load;
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/* Check if OPMASK state, upper 256-bit of ZMM0-ZMM15 and
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ZMM16-ZMM31 state are enabled. */
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if ((xcrlow & (bit_Opmask_state | bit_ZMM0_15_state
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| bit_ZMM16_31_state)) ==
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(bit_Opmask_state | bit_ZMM0_15_state | bit_ZMM16_31_state))
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{
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/* Determine if AVX512F is usable. */
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if (CPUID_AVX512F)
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{
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__cpu_features.feature[index_AVX512F_Usable]
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|= bit_AVX512F_Usable;
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/* Determine if AVX512DQ is usable. */
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if (CPUID_AVX512DQ)
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__cpu_features.feature[index_AVX512DQ_Usable]
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|= bit_AVX512DQ_Usable;
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}
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}
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/* Determine if FMA is usable. */
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if (CPUID_FMA)
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__cpu_features.feature[index_FMA_Usable] |= bit_FMA_Usable;
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/* Determine if FMA4 is usable. */
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if (CPUID_FMA4)
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__cpu_features.feature[index_FMA4_Usable] |= bit_FMA4_Usable;
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}
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}
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__cpu_features.family = family;
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__cpu_features.model = model;
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atomic_write_barrier ();
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__cpu_features.kind = kind;
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}
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#undef __get_cpu_features
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const struct cpu_features *
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__get_cpu_features (void)
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{
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if (__cpu_features.kind == arch_kind_unknown)
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__init_cpu_features ();
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return &__cpu_features;
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}
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