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1999-05-23 Ulrich Drepper <drepper@cygnus.com> * sysdeps/alpha/fpu/bits/fenv.h: Pretty print. * sysdeps/sparc/sparc64/fpu/bits/fenv.h: Remove unneeded #if. 1999-05-22 Andreas Schwab <schwab@issan.cs.uni-dortmund.de> * sysdeps/m68k/fpu/bits/fenv.h (fenv_t): Prepend __ to member names to protect from user's macro namespace. * sysdeps/arm/fpu/bits/fenv.h (fenv_t): Likewise. * sysdeps/generic/bits/fenv.h (fexcept_t, fenv_t): Likewise. * sysdeps/i386/fpu/bits/fenv.h (fenv_t): Likewise. * sysdeps/mips/bits/fenv.h (fenv_t): Likewise. * sysdeps/m68k/fpu/feholdexcpt.c, sysdeps/m68k/fpu/fesetenv.c: Adapted. * sysdeps/arm/fpu/fegetenv.c, sysdeps/arm/fpu/feholdexcpt.c, sysdeps/arm/fpu/fesetenv.c: Likewise. * sysdeps/i386/fpu/fclrexcpt.c, sysdeps/i386/fpu/feholdexcpt.c, sysdeps/i386/fpu/fesetenv.c, sysdeps/i386/fpu/fraiseexcpt.c, sysdeps/i386/fpu/fsetexcptflg.c: Likewise. * sysdeps/mips/fesetenv.c: Likewise.
59 lines
1.9 KiB
C
59 lines
1.9 KiB
C
/* Copyright (C) 1997, 1998, 1999 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Library General Public License as
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published by the Free Software Foundation; either version 2 of the
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License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Library General Public License for more details.
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You should have received a copy of the GNU Library General Public
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License along with the GNU C Library; see the file COPYING.LIB. If not,
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write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#ifndef _FENV_H
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# error "Never use <bits/fenv.h> directly; include <fenv.h> instead."
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#endif
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/* Define bits representing exceptions in the FPU status word. */
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enum
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{
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FE_INVALID = 1,
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#define FE_INVALID FE_INVALID
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FE_DIVBYZERO = 2,
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#define FE_DIVBYZERO FE_DIVBYZERO
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FE_OVERFLOW = 4,
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#define FE_OVERFLOW FE_OVERFLOW
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FE_UNDERFLOW = 8,
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#define FE_UNDERFLOW FE_UNDERFLOW
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};
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/* Amount to shift by to convert an exception to a mask bit. */
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#define FE_EXCEPT_SHIFT 16
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/* All supported exceptions. */
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#define FE_ALL_EXCEPT \
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(FE_INVALID | FE_DIVBYZERO | FE_OVERFLOW | FE_UNDERFLOW)
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/* The ARM FPU basically only supports round-to-nearest. Other rounding
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modes exist, but you have to encode them in the actual instruction. */
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#define FE_TONEAREST 0
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/* Type representing exception flags. */
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typedef unsigned long int fexcept_t;
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/* Type representing floating-point environment. */
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typedef struct
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{
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unsigned long int __cw;
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}
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fenv_t;
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/* If the default argument is used we use this value. */
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#define FE_DFL_ENV ((fenv_t *) -1l)
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