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https://sourceware.org/git/glibc.git
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265 lines
6.0 KiB
ArmAsm
265 lines
6.0 KiB
ArmAsm
/* Placeholder function, not used by any processor at the moment.
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Copyright (C) 2022-2024 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#ifndef STRNLEN
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#define STRNLEN __strnlen_evex512
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#endif
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#include "x86-evex512-vecs.h"
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#include "reg-macros.h"
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#include <isa-level.h>
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#if ISA_SHOULD_BUILD (4)
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# include <sysdep.h>
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# ifdef USE_AS_WCSLEN
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# define VPCMPEQ vpcmpeqd
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# define VPTESTN vptestnmd
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# define VPMINU vpminud
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# define CHAR_SIZE 4
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# else
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# define VPCMPEQ vpcmpeqb
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# define VPTESTN vptestnmb
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# define VPMINU vpminub
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# define CHAR_SIZE 1
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# endif
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# define PAGE_SIZE 4096
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# define CHAR_PER_VEC (VEC_SIZE / CHAR_SIZE)
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.section SECTION(.text),"ax",@progbits
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/* Aligning entry point to 64 byte, provides better performance for
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one vector length string. */
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ENTRY_P2ALIGN (STRNLEN, 6)
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/* Check zero length. */
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test %RSI_LP, %RSI_LP
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jz L(ret_max)
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# ifdef __ILP32__
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/* Clear the upper 32 bits. */
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movl %esi, %esi
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# endif
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movl %edi, %eax
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vpxorq %VMM_128(0), %VMM_128(0), %VMM_128(0)
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sall $20, %eax
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cmpl $((PAGE_SIZE - VEC_SIZE) << 20), %eax
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ja L(page_cross)
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/* Compare [w]char for null, mask bit will be set for match. */
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VPCMPEQ (%rdi), %VMM(0), %k0
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KMOV %k0, %VRCX
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/* Store max length in rax. */
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mov %rsi, %rax
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/* If rcx is 0, rax will have max length. We can not use VRCX
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and VRAX here for evex256 because, upper 32 bits may be
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undefined for ecx and eax. */
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bsfq %rcx, %rax
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cmp $CHAR_PER_VEC, %rax
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ja L(align_more)
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cmpq %rax, %rsi
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cmovb %esi, %eax
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ret
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/* At this point vector max length reached. */
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.p2align 4,,3
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L(ret_max):
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movq %rsi, %rax
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ret
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L(align_more):
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mov %rdi, %rax
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/* Align rax to VEC_SIZE. */
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andq $-VEC_SIZE, %rax
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movq %rdi, %rdx
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subq %rax, %rdx
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# ifdef USE_AS_WCSLEN
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shr $2, %VRDX
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# endif
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/* At this point rdx contains [w]chars already compared. */
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leaq -CHAR_PER_VEC(%rsi, %rdx), %rdx
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/* At this point rdx contains number of w[char] needs to go.
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Now onwards rdx will keep decrementing with each compare. */
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/* Loop unroll 4 times for 4 vector loop. */
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VPCMPEQ VEC_SIZE(%rax), %VMM(0), %k0
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subq $-VEC_SIZE, %rax
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KMOV %k0, %VRCX
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test %VRCX, %VRCX
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jnz L(ret_vec_x1)
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subq $CHAR_PER_VEC, %rdx
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jbe L(ret_max)
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VPCMPEQ VEC_SIZE(%rax), %VMM(0), %k0
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KMOV %k0, %VRCX
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test %VRCX, %VRCX
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jnz L(ret_vec_x2)
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subq $CHAR_PER_VEC, %rdx
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jbe L(ret_max)
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VPCMPEQ (VEC_SIZE * 2)(%rax), %VMM(0), %k0
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KMOV %k0, %VRCX
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test %VRCX, %VRCX
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jnz L(ret_vec_x3)
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subq $CHAR_PER_VEC, %rdx
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jbe L(ret_max)
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VPCMPEQ (VEC_SIZE * 3)(%rax), %VMM(0), %k0
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KMOV %k0, %VRCX
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test %VRCX, %VRCX
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jnz L(ret_vec_x4)
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subq $CHAR_PER_VEC, %rdx
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jbe L(ret_max)
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/* Save pointer before 4 x VEC_SIZE alignment. */
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movq %rax, %rcx
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/* Align address to VEC_SIZE * 4 for loop. */
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andq $-(VEC_SIZE * 4), %rax
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subq %rax, %rcx
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# ifdef USE_AS_WCSLEN
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shr $2, %VRCX
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# endif
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/* rcx contains number of [w]char will be recompared due to
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alignment fixes. rdx must be incremented by rcx to offset
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alignment adjustment. */
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addq %rcx, %rdx
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/* Need jump as we don't want to add/subtract rdx for first
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iteration of 4 x VEC_SIZE aligned loop. */
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.p2align 4,,11
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L(loop):
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/* VPMINU and VPCMP combination provide better performance as
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compared to alternative combinations. */
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VMOVA (VEC_SIZE * 4)(%rax), %VMM(1)
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VPMINU (VEC_SIZE * 5)(%rax), %VMM(1), %VMM(2)
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VMOVA (VEC_SIZE * 6)(%rax), %VMM(3)
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VPMINU (VEC_SIZE * 7)(%rax), %VMM(3), %VMM(4)
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VPTESTN %VMM(2), %VMM(2), %k0
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VPTESTN %VMM(4), %VMM(4), %k1
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subq $-(VEC_SIZE * 4), %rax
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KORTEST %k0, %k1
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jnz L(loopend)
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subq $(CHAR_PER_VEC * 4), %rdx
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ja L(loop)
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mov %rsi, %rax
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ret
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L(loopend):
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VPTESTN %VMM(1), %VMM(1), %k2
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KMOV %k2, %VRCX
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test %VRCX, %VRCX
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jnz L(ret_vec_x1)
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KMOV %k0, %VRCX
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/* At this point, if k0 is non zero, null char must be in the
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second vector. */
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test %VRCX, %VRCX
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jnz L(ret_vec_x2)
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VPTESTN %VMM(3), %VMM(3), %k3
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KMOV %k3, %VRCX
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test %VRCX, %VRCX
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jnz L(ret_vec_x3)
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/* At this point null [w]char must be in the fourth vector so no
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need to check. */
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KMOV %k1, %VRCX
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/* Fourth, third, second vector terminating are pretty much
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same, implemented this way to avoid branching and reuse code
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from pre loop exit condition. */
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L(ret_vec_x4):
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bsf %VRCX, %VRCX
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subq %rdi, %rax
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# ifdef USE_AS_WCSLEN
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subq $-(VEC_SIZE * 3), %rax
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shrq $2, %rax
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addq %rcx, %rax
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# else
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leaq (VEC_SIZE * 3)(%rcx, %rax), %rax
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# endif
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cmpq %rsi, %rax
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cmovnb %rsi, %rax
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ret
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L(ret_vec_x3):
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bsf %VRCX, %VRCX
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subq %rdi, %rax
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# ifdef USE_AS_WCSLEN
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subq $-(VEC_SIZE * 2), %rax
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shrq $2, %rax
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addq %rcx, %rax
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# else
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leaq (VEC_SIZE * 2)(%rcx, %rax), %rax
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# endif
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cmpq %rsi, %rax
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cmovnb %rsi, %rax
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ret
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L(ret_vec_x2):
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subq $-VEC_SIZE, %rax
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L(ret_vec_x1):
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bsf %VRCX, %VRCX
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subq %rdi, %rax
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# ifdef USE_AS_WCSLEN
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shrq $2, %rax
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# endif
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addq %rcx, %rax
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cmpq %rsi, %rax
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cmovnb %rsi, %rax
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ret
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L(page_cross):
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mov %rdi, %rax
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movl %edi, %ecx
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andl $(VEC_SIZE - 1), %ecx
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# ifdef USE_AS_WCSLEN
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sarl $2, %ecx
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# endif
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/* ecx contains number of w[char] to be skipped as a result
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of address alignment. */
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andq $-VEC_SIZE, %rax
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VPCMPEQ (%rax), %VMM(0), %k0
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KMOV %k0, %VRDX
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/* Ignore number of character for alignment adjustment. */
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shr %cl, %VRDX
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jnz L(page_cross_end)
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movl $CHAR_PER_VEC, %eax
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sub %ecx, %eax
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cmp %rax, %rsi
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ja L(align_more)
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L(page_cross_end):
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bsf %VRDX, %VRAX
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cmpq %rsi, %rax
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cmovnb %esi, %eax
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ret
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END (STRNLEN)
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#endif
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