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0609ec0a74
Continuing the preparation for additional _FloatN / _FloatNx function aliases, this patch makes ia64 libm function implementations use libm_alias_double to define function aliases. The same approach is followed as with the corresponding long double patch: the ia64-specific macros are left unchanged, with calls to libm_alias_double_other being added in most cases and libm_alias_double itself being used in only a few places. Tested with build-many-glibcs.py for ia64-linux-gnu that installed stripped shared libraries are unchanged by the patch. * sysdeps/ia64/fpu/libm-symbols.h: Include <libm-alias-double.h>. * sysdeps/ia64/fpu/e_acos.S (acos): Use libm_alias_double_other. * sysdeps/ia64/fpu/e_acosh.S (acosh): Likewise. * sysdeps/ia64/fpu/e_asin.S (asin): Likewise. * sysdeps/ia64/fpu/e_atan2.S (atan2): Likewise. * sysdeps/ia64/fpu/e_atanh.S (atanh): Likewise. * sysdeps/ia64/fpu/e_cosh.S (cosh): Likewise. * sysdeps/ia64/fpu/e_exp.S (exp): Likewise. * sysdeps/ia64/fpu/e_exp10.S (exp10): Likewise. * sysdeps/ia64/fpu/e_exp2.S (exp2): Likewise. * sysdeps/ia64/fpu/e_fmod.S (fmod): Likewise. * sysdeps/ia64/fpu/e_hypot.S (hypot): Likewise. * sysdeps/ia64/fpu/e_lgamma_r.c (lgamma_r): Define using libm_alias_double_r. * sysdeps/ia64/fpu/e_log.S (log10): Use libm_alias_double_other. (log): Likewise. * sysdeps/ia64/fpu/e_log2.S (log2): Likewise. * sysdeps/ia64/fpu/e_pow.S (pow): Likewise. * sysdeps/ia64/fpu/e_remainder.S (remainder): Likewise. * sysdeps/ia64/fpu/e_sinh.S (sinh): Likewise. * sysdeps/ia64/fpu/e_sqrt.S (sqrt): Likewise. * sysdeps/ia64/fpu/libm_sincos.S (sincos): Likewise. * sysdeps/ia64/fpu/s_asinh.S (asinh): Likewise. * sysdeps/ia64/fpu/s_atan.S (atan): Likewise. * sysdeps/ia64/fpu/s_cbrt.S (cbrt): Likewise. * sysdeps/ia64/fpu/s_ceil.S (ceil): Likewise. * sysdeps/ia64/fpu/s_copysign.S (copysign): Define using libm_alias_double. * sysdeps/ia64/fpu/s_cos.S (sin): Use libm_alias_double_other. (cos): Likewise. * sysdeps/ia64/fpu/s_erf.S (erf): Likewise. * sysdeps/ia64/fpu/s_erfc.S (erfc): Likewise. * sysdeps/ia64/fpu/s_expm1.S (expm1): Likewise. * sysdeps/ia64/fpu/s_fabs.S (fabs): Likewise. * sysdeps/ia64/fpu/s_fdim.S (fdim): Likewise. * sysdeps/ia64/fpu/s_floor.S (floor): Likewise. * sysdeps/ia64/fpu/s_fma.S (fma): Likewise. * sysdeps/ia64/fpu/s_fmax.S (fmax): Likewise. * sysdeps/ia64/fpu/s_frexp.c (frexp): Likewise. * sysdeps/ia64/fpu/s_ldexp.c (ldexp): Likewise. * sysdeps/ia64/fpu/s_log1p.S (log1p): Likewise. * sysdeps/ia64/fpu/s_logb.S (logb): Likewise. * sysdeps/ia64/fpu/s_modf.S (modf): Likewise. * sysdeps/ia64/fpu/s_nearbyint.S (nearbyint): Likewise. * sysdeps/ia64/fpu/s_nextafter.S (nextafter): Likewise. * sysdeps/ia64/fpu/s_rint.S (rint): Likewise. * sysdeps/ia64/fpu/s_round.S (round): Likewise. * sysdeps/ia64/fpu/s_scalbn.c (scalbn): Define using libm_alias_double. * sysdeps/ia64/fpu/s_tan.S (tan): Use libm_alias_double_other. * sysdeps/ia64/fpu/s_tanh.S (tanh): Likewise. * sysdeps/ia64/fpu/s_trunc.S (trunc): Likewise. * sysdeps/ia64/fpu/w_lgamma_main.c [BUILD_LGAMMA && !USE_AS_COMPAT] (lgamma): Likewise. * sysdeps/ia64/fpu/w_tgamma_compat.S (tgamma): Likewise.
344 lines
9.1 KiB
ArmAsm
344 lines
9.1 KiB
ArmAsm
.file "sqrt.s"
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// Copyright (c) 2000 - 2003, Intel Corporation
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// All rights reserved.
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//
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// Contributed 2000 by the Intel Numerics Group, Intel Corporation
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// * Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// * The name of Intel Corporation may not be used to endorse or promote
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// products derived from this software without specific prior written
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// permission.
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
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// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Intel Corporation is the author of this code, and requests that all
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// problem reports or change requests be submitted to it directly at
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// http://www.intel.com/software/products/opensource/libraries/num.htm.
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//
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//********************************************************************
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// History
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//********************************************************************
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// 02/02/00 Initial version
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// 04/04/00 Unwind support added
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// 08/15/00 Bundle added after call to __libm_error_support to properly
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// set [the previously overwritten] GR_Parameter_RESULT.
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// 02/10/03 Reordered header: .section, .global, .proc, .align
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//
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//********************************************************************
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//
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// Function: Combined sqrt(x), where
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// _
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// sqrt(x) = |x, for double precision x values
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//
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//********************************************************************
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//
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// Accuracy: Correctly Rounded
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//
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//********************************************************************
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//
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// Resources Used:
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//
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// Floating-Point Registers: f8 (Input and Return Value)
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// f7 -f14
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//
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// General Purpose Registers:
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// r32-r36 (Locals)
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// r37-r40 (Used to pass arguments to error handling routine)
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//
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// Predicate Registers: p6, p7, p8
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//
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//*********************************************************************
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//
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// IEEE Special Conditions:
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//
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// All faults and exceptions should be raised correctly.
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// sqrt(QNaN) = QNaN
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// sqrt(SNaN) = QNaN
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// sqrt(+/-0) = +/-0
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// sqrt(negative) = QNaN and error handling is called
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//
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//*********************************************************************
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//
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// Implementation:
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//
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// Modified Newton-Raphson Algorithm
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//
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//*********************************************************************
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GR_SAVE_PFS = r33
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GR_SAVE_B0 = r34
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GR_SAVE_GP = r35
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GR_Parameter_X = r37
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GR_Parameter_Y = r38
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GR_Parameter_RESULT = r39
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.section .text
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GLOBAL_IEEE754_ENTRY(sqrt)
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{ .mfi
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alloc r32= ar.pfs,0,5,4,0
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frsqrta.s0 f7,p6=f8
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nop.i 0
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} { .mlx
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// BEGIN DOUBLE PRECISION MINIMUM LATENCY SQUARE ROOT ALGORITHM
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nop.m 0
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// exponent of +1/2 in r2
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movl r2 = 0x0fffe;;
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} { .mmi
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// +1/2 in f9
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setf.exp f9 = r2
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nop.m 0
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nop.i 0
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} { .mlx
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nop.m 0
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// 3/2 in r3
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movl r3=0x3fc00000;;
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} { .mfi
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setf.s f10=r3
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// Step (1)
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// y0 = 1/sqrt(a) in f7
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fclass.m.unc p7,p8 = f8,0x3A
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nop.i 0;;
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} { .mlx
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nop.m 0
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// 5/2 in r2
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movl r2 = 0x40200000
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} { .mlx
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nop.m 0
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// 63/8 in r3
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movl r3 = 0x40fc0000;;
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} { .mfi
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setf.s f11=r2
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// Step (2)
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// h = +1/2 * y0 in f6
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(p6) fma.s1 f6=f9,f7,f0
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nop.i 0
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} { .mfi
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setf.s f12=r3
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// Step (3)
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// g = a * y0 in f7
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(p6) fma.s1 f7=f8,f7,f0
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nop.i 0
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} { .mfi
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nop.m 0
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mov f15 = f8
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nop.i 0;;
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} { .mlx
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nop.m 0
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// 231/16 in r2
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movl r2 = 0x41670000;;
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} { .mfi
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setf.s f13=r2
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// Step (4)
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// e = 1/2 - g * h in f9
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(p6) fnma.s1 f9=f7,f6,f9
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nop.i 0
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} { .mlx
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nop.m 0
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// 35/8 in r3
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movl r3 = 0x408c0000;;
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} { .mfi
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setf.s f14=r3
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// Step (5)
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// S = 3/2 + 5/2 * e in f10
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(p6) fma.s1 f10=f11,f9,f10
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nop.i 0
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} { .mfi
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nop.m 0
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// Step (6)
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// e2 = e * e in f11
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(p6) fma.s1 f11=f9,f9,f0
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nop.i 0;;
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} { .mfi
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nop.m 0
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// Step (7)
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// t = 63/8 + 231/16 * e in f12
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(p6) fma.s1 f12=f13,f9,f12
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nop.i 0;;
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} { .mfi
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nop.m 0
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// Step (8)
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// S1 = e + e2 * S in f10
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(p6) fma.s1 f10=f11,f10,f9
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nop.i 0
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} { .mfi
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nop.m 0
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// Step (9)
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// e4 = e2 * e2 in f11
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(p6) fma.s1 f11=f11,f11,f0
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nop.i 0;;
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} { .mfi
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nop.m 0
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// Step (10)
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// t1 = 35/8 + e * t in f9
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(p6) fma.s1 f9=f9,f12,f14
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nop.i 0;;
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} { .mfi
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nop.m 0
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// Step (11)
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// G = g + S1 * g in f12
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(p6) fma.s1 f12=f10,f7,f7
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nop.i 0
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} { .mfi
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nop.m 0
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// Step (12)
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// E = g * e4 in f7
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(p6) fma.s1 f7=f7,f11,f0
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nop.i 0;;
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} { .mfi
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nop.m 0
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// Step (13)
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// u = S1 + e4 * t1 in f10
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(p6) fma.s1 f10=f11,f9,f10
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nop.i 0;;
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} { .mfi
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nop.m 0
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// Step (14)
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// g1 = G + t1 * E in f7
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(p6) fma.d.s1 f7=f9,f7,f12
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nop.i 0;;
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} { .mfi
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nop.m 0
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// Step (15)
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// h1 = h + u * h in f6
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(p6) fma.s1 f6=f10,f6,f6
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nop.i 0;;
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} { .mfi
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nop.m 0
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// Step (16)
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// d = a - g1 * g1 in f9
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(p6) fnma.s1 f9=f7,f7,f8
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nop.i 0;;
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} { .mfb
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nop.m 0
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// Step (17)
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// g2 = g1 + d * h1 in f7
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(p6) fma.d.s0 f8=f9,f6,f7
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(p6) br.ret.sptk b0 ;;
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}
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{ .mfb
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nop.m 0
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mov f8 = f7
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(p8) br.ret.sptk b0 ;;
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}
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{ .mfb
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(p7) mov r40 = 49
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nop.f 0
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(p7) br.cond.sptk __libm_error_region ;;
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}
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// END DOUBLE PRECISION MINIMUM LATENCY SQUARE ROOT ALGORITHM
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GLOBAL_IEEE754_END(sqrt)
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libm_alias_double_other (__sqrt, sqrt)
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// Stack operations when calling error support.
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// (1) (2) (3) (call) (4)
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// sp -> + psp -> + psp -> + sp -> +
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// | | | |
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// | | <- GR_Y R3 ->| <- GR_RESULT | -> f8
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// | | | |
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// | <-GR_Y Y2->| Y2 ->| <- GR_Y |
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// | | | |
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// | | <- GR_X X1 ->| |
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// | | | |
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// sp-64 -> + sp -> + sp -> + +
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// save ar.pfs save b0 restore gp
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// save gp restore ar.pfs
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LOCAL_LIBM_ENTRY(__libm_error_region)
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//
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// This branch includes all those special values that are not negative,
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// with the result equal to frcpa(x)
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//
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.prologue
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// We are distinguishing between over(under)flow and letting
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// __libm_error_support set ERANGE or do anything else needed.
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// (1)
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{ .mfi
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add GR_Parameter_Y=-32,sp // Parameter 2 value
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nop.f 0
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.save ar.pfs,GR_SAVE_PFS
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mov GR_SAVE_PFS=ar.pfs // Save ar.pfs
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}
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{ .mfi
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.fframe 64
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add sp=-64,sp // Create new stack
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nop.f 0
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mov GR_SAVE_GP=gp // Save gp
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};;
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// (2)
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{ .mmi
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stfd [GR_Parameter_Y] = f0,16 // STORE Parameter 2 on stack
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add GR_Parameter_X = 16,sp // Parameter 1 address
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.save b0, GR_SAVE_B0
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mov GR_SAVE_B0=b0 // Save b0
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};;
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.body
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// (3)
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{ .mib
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stfd [GR_Parameter_X] = f15 // STORE Parameter 1 on stack
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add GR_Parameter_RESULT = 0,GR_Parameter_Y // Parameter 3 address
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nop.b 0
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}
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{ .mib
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stfd [GR_Parameter_Y] = f8 // STORE Parameter 3 on stack
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add GR_Parameter_Y = -16,GR_Parameter_Y
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br.call.sptk b0=__libm_error_support# // Call error handling function
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};;
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{ .mmi
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nop.m 0
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nop.m 0
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add GR_Parameter_RESULT = 48,sp
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};;
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// (4)
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{ .mmi
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ldfd f8 = [GR_Parameter_RESULT] // Get return result off stack
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.restore sp
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add sp = 64,sp // Restore stack pointer
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mov b0 = GR_SAVE_B0 // Restore return address
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};;
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{ .mib
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mov gp = GR_SAVE_GP // Restore gp
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mov ar.pfs = GR_SAVE_PFS // Restore ar.pfs
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br.ret.sptk b0 // Return
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};;
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LOCAL_LIBM_END(__libm_error_region)
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.type __libm_error_support#,@function
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.global __libm_error_support#
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