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2d09b95d5a
1998-09-13 18:04 Geoff Keating <geoffk@ozemail.com.au> * sysdeps/powerpc/dl-machine.c (PPC_DCBST,PPC_SYNC,PPC_ISYNC,PPC_ICBI): Don't mark asm `volatile'. (__elf_machine_runtime_setup): Clear the last partial block in the PLT from the data cache too. Assume it isn't in the instruction cache yet. (__elf_machine_fixup_plt): Clear the modified address from the caches.
447 lines
15 KiB
C
447 lines
15 KiB
C
/* Machine-dependent ELF dynamic relocation functions. PowerPC version.
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Copyright (C) 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Library General Public License as
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published by the Free Software Foundation; either version 2 of the
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License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Library General Public License for more details.
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You should have received a copy of the GNU Library General Public
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License along with the GNU C Library; see the file COPYING.LIB. If not,
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write to the Free Software Foundation, Inc., 59 Temple Place - Suite 330,
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Boston, MA 02111-1307, USA. */
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#include <unistd.h>
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#include <string.h>
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#include <sys/param.h>
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#include <link.h>
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#include <dl-machine.h>
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#include <elf/ldsodefs.h>
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#include <elf/dynamic-link.h>
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/* Because ld.so is now versioned, these functions can be in their own file;
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no relocations need to be done to call them.
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Of course, if ld.so is not versioned... */
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#if !(DO_VERSIONING - 0)
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#error This will not work with versioning turned off, sorry.
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#endif
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/* stuff for the PLT */
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#define PLT_INITIAL_ENTRY_WORDS 18
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#define PLT_LONGBRANCH_ENTRY_WORDS 10
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#define PLT_DOUBLE_SIZE (1<<13)
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#define PLT_ENTRY_START_WORDS(entry_number) \
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(PLT_INITIAL_ENTRY_WORDS + (entry_number)*2 + \
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((entry_number) > PLT_DOUBLE_SIZE ? \
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((entry_number) - PLT_DOUBLE_SIZE)*2 : \
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0))
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#define PLT_DATA_START_WORDS(num_entries) PLT_ENTRY_START_WORDS(num_entries)
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#define OPCODE_ADDI(rd,ra,simm) \
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(0x38000000 | (rd) << 21 | (ra) << 16 | (simm) & 0xffff)
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#define OPCODE_ADDIS(rd,ra,simm) \
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(0x3c000000 | (rd) << 21 | (ra) << 16 | (simm) & 0xffff)
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#define OPCODE_ADD(rd,ra,rb) \
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(0x7c000214 | (rd) << 21 | (ra) << 16 | (rb) << 11)
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#define OPCODE_B(target) (0x48000000 | (target) & 0x03fffffc)
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#define OPCODE_BA(target) (0x48000002 | (target) & 0x03fffffc)
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#define OPCODE_BCTR() 0x4e800420
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#define OPCODE_LWZ(rd,d,ra) \
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(0x80000000 | (rd) << 21 | (ra) << 16 | (d) & 0xffff)
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#define OPCODE_MTCTR(rd) (0x7C0903A6 | (rd) << 21)
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#define OPCODE_RLWINM(ra,rs,sh,mb,me) \
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(0x54000000 | (rs) << 21 | (ra) << 16 | (sh) << 11 | (mb) << 6 | (me) << 1)
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#define OPCODE_LI(rd,simm) OPCODE_ADDI(rd,0,simm)
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#define OPCODE_SLWI(ra,rs,sh) OPCODE_RLWINM(ra,rs,sh,0,31-sh)
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#define PPC_DCBST(where) asm ("dcbst 0,%0" : : "r"(where) : "memory")
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#define PPC_SYNC asm ("sync" : : : "memory")
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#define PPC_ISYNC asm volatile ("sync; isync" : : : "memory")
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#define PPC_ICBI(where) asm ("icbi 0,%0" : : "r"(where) : "memory")
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#define PPC_DIE asm volatile ("tweq 0,0")
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/* Use this when you've modified some code, but it won't be in the
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instruction fetch queue (or when it doesn't matter if it is). */
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#define MODIFIED_CODE_NOQUEUE(where) \
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do { PPC_DCBST(where); PPC_SYNC; PPC_ICBI(where); } while (0)
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/* Use this when it might be in the instruction queue. */
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#define MODIFIED_CODE(where) \
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do { PPC_DCBST(where); PPC_SYNC; PPC_ICBI(where); PPC_ISYNC; } while (0)
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/* The idea here is that to conform to the ABI, we are supposed to try
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to load dynamic objects between 0x10000 (we actually use 0x40000 as
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the lower bound, to increase the chance of a memory reference from
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a null pointer giving a segfault) and the program's load address;
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this may allow us to use a branch instruction in the PLT rather
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than a computed jump. The address is only used as a preference for
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mmap, so if we get it wrong the worst that happens is that it gets
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mapped somewhere else. */
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ElfW(Addr)
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__elf_preferred_address(struct link_map *loader, size_t maplength,
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ElfW(Addr) mapstartpref)
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{
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ElfW(Addr) low, high;
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struct link_map *l;
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/* If the object has a preference, load it there! */
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if (mapstartpref != 0)
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return mapstartpref;
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/* Otherwise, quickly look for a suitable gap between 0x3FFFF and
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0x70000000. 0x3FFFF is so that references off NULL pointers will
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cause a segfault, 0x70000000 is just paranoia (it should always
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be superceded by the program's load address). */
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low = 0x0003FFFF;
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high = 0x70000000;
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for (l = _dl_loaded; l; l = l->l_next)
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{
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ElfW(Addr) mapstart, mapend;
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mapstart = l->l_map_start & ~(_dl_pagesize - 1);
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mapend = l->l_map_end | (_dl_pagesize - 1);
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assert (mapend > mapstart);
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if (mapend >= high && high >= mapstart)
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high = mapstart;
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else if (mapend >= low && low >= mapstart)
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low = mapend;
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else if (high >= mapend && mapstart >= low)
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{
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if (high - mapend >= mapstart - low)
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low = mapend;
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else
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high = mapstart;
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}
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}
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high -= 0x10000; /* Allow some room between objects. */
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maplength = (maplength | (_dl_pagesize-1)) + 1;
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if (high <= low || high - low < maplength )
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return 0;
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return high - maplength; /* Both high and maplength are page-aligned. */
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}
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/* Set up the loaded object described by L so its unrelocated PLT
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entries will jump to the on-demand fixup code in dl-runtime.c.
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Also install a small trampoline to be used by entries that have
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been relocated to an address too far away for a single branch. */
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/* A PLT entry does one of three things:
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(i) Jumps to the actual routine. Such entries are set up above, in
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elf_machine_rela.
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(ii) Jumps to the actual routine via glue at the start of the PLT.
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We do this by putting the address of the routine in space
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allocated at the end of the PLT, and when the PLT entry is
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called we load the offset of that word (from the start of the
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space) into r11, then call the glue, which loads the word and
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branches to that address. These entries are set up in
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elf_machine_rela, but the glue is set up here.
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(iii) Loads the index of this PLT entry (we count the double-size
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entries as one entry for this purpose) into r11, then
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branches to code at the start of the PLT. This code then
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calls `fixup', in dl-runtime.c, via the glue in the macro
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ELF_MACHINE_RUNTIME_TRAMPOLINE, which resets the PLT entry to
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be one of the above two types. These entries are set up here. */
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int
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__elf_machine_runtime_setup (struct link_map *map, int lazy, int profile)
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{
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if (map->l_info[DT_JMPREL])
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{
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Elf32_Word i;
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/* Fill in the PLT. Its initial contents are directed to a
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function earlier in the PLT which arranges for the dynamic
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linker to be called back. */
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Elf32_Word *plt = (Elf32_Word *) ((char *) map->l_addr
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+ map->l_info[DT_PLTGOT]->d_un.d_val);
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Elf32_Word num_plt_entries = (map->l_info[DT_PLTRELSZ]->d_un.d_val
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/ sizeof (Elf32_Rela));
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Elf32_Word rel_offset_words = PLT_DATA_START_WORDS (num_plt_entries);
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Elf32_Word size_modified;
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extern void _dl_runtime_resolve (void);
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extern void _dl_prof_resolve (void);
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Elf32_Word dlrr;
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dlrr = (Elf32_Word)(char *)(profile
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? _dl_prof_resolve
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: _dl_runtime_resolve);
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if (lazy)
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for (i = 0; i < num_plt_entries; i++)
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{
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Elf32_Word offset = PLT_ENTRY_START_WORDS (i);
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if (i >= PLT_DOUBLE_SIZE)
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{
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plt[offset ] = OPCODE_LI (11, i * 4);
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plt[offset+1] = OPCODE_ADDIS (11, 11, (i * 4 + 0x8000) >> 16);
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plt[offset+2] = OPCODE_B (-(4 * (offset + 2)));
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}
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else
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{
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plt[offset ] = OPCODE_LI (11, i * 4);
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plt[offset+1] = OPCODE_B (-(4 * (offset + 1)));
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}
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}
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/* Multiply index of entry by 3 (in r11). */
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plt[0] = OPCODE_SLWI (12, 11, 1);
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plt[1] = OPCODE_ADD (11, 12, 11);
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if (dlrr <= 0x01fffffc || dlrr >= 0xfe000000)
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{
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/* Load address of link map in r12. */
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plt[2] = OPCODE_LI (12, (Elf32_Word) (char *) map);
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plt[3] = OPCODE_ADDIS (12, 12, (((Elf32_Word) (char *) map
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+ 0x8000) >> 16));
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/* Call _dl_runtime_resolve. */
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plt[4] = OPCODE_BA (dlrr);
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}
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else
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{
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/* Get address of _dl_runtime_resolve in CTR. */
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plt[2] = OPCODE_LI (12, dlrr);
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plt[3] = OPCODE_ADDIS (12, 12, (dlrr + 0x8000) >> 16);
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plt[4] = OPCODE_MTCTR (12);
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/* Load address of link map in r12. */
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plt[5] = OPCODE_LI (12, (Elf32_Word) (char *) map);
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plt[6] = OPCODE_ADDIS (12, 12, (((Elf32_Word) (char *) map
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+ 0x8000) >> 16));
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/* Call _dl_runtime_resolve. */
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plt[7] = OPCODE_BCTR ();
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}
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/* Convert the index in r11 into an actual address, and get the
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word at that address. */
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plt[PLT_LONGBRANCH_ENTRY_WORDS] =
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OPCODE_ADDIS (11, 11, (((Elf32_Word) (char*) (plt + rel_offset_words)
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+ 0x8000) >> 16));
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plt[PLT_LONGBRANCH_ENTRY_WORDS+1] =
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OPCODE_LWZ (11, (Elf32_Word) (char*) (plt+rel_offset_words), 11);
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/* Call the procedure at that address. */
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plt[PLT_LONGBRANCH_ENTRY_WORDS+2] = OPCODE_MTCTR (11);
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plt[PLT_LONGBRANCH_ENTRY_WORDS+3] = OPCODE_BCTR ();
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/* Now, we've modified code (quite a lot of code, possibly). We
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need to write the changes from the data cache to a
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second-level unified cache, then make sure that stale data in
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the instruction cache is removed. (In a multiprocessor
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system, the effect is more complex.) Most of the PLT shouldn't
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be in the instruction cache, but there may be a little overlap
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at the start and the end.
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Assumes the cache line size is at least 32 bytes, or at least
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that dcbst and icbi apply to 32-byte lines. At present, all
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PowerPC processors have line sizes of exactly 32 bytes. */
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size_modified = lazy ? rel_offset_words : PLT_INITIAL_ENTRY_WORDS;
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for (i = 0; i < size_modified; i+=8)
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PPC_DCBST (plt + i);
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PPC_DCBST (plt + size_modified-1);
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PPC_SYNC;
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PPC_ICBI (plt);
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PPC_ICBI (plt + size_modified-1);
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PPC_ISYNC;
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}
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return lazy;
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}
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void
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__elf_machine_fixup_plt(struct link_map *map, const Elf32_Rela *reloc,
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Elf32_Addr *reloc_addr, Elf32_Addr finaladdr)
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{
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Elf32_Sword delta = finaladdr - (Elf32_Word) (char *) reloc_addr;
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if (delta << 6 >> 6 == delta)
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*reloc_addr = OPCODE_B (delta);
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else if (finaladdr <= 0x01fffffc || finaladdr >= 0xfe000000)
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*reloc_addr = OPCODE_BA (finaladdr);
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else
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{
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Elf32_Word *plt;
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Elf32_Word index;
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plt = (Elf32_Word *)((char *)map->l_addr
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+ map->l_info[DT_PLTGOT]->d_un.d_val);
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index = (reloc_addr - plt - PLT_INITIAL_ENTRY_WORDS)/2;
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if (index >= PLT_DOUBLE_SIZE)
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{
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/* Slots greater than or equal to 2^13 have 4 words available
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instead of two. */
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/* FIXME: There are some possible race conditions in this code,
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when called from 'fixup'.
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1) Suppose that a lazy PLT entry is executing, a context switch
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between threads (or a signal) occurs, and the new thread or
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signal handler calls the same lazy PLT entry. Then the PLT entry
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would be changed while it's being run, which will cause a segfault
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(almost always).
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2) Suppose the reverse: that a lazy PLT entry is being updated,
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a context switch occurs, and the new code calls the lazy PLT
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entry that is being updated. Then the half-fixed PLT entry will
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be executed, which will also almost always cause a segfault.
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These problems don't happen with the 2-word entries, because
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only one of the two instructions are changed when a lazy entry
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is retargeted at the actual PLT entry; the li instruction stays
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the same (we have to update it anyway, because we might not be
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updating a lazy PLT entry). */
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reloc_addr[0] = OPCODE_LI (11, finaladdr);
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reloc_addr[1] = OPCODE_ADDIS (11, 11, finaladdr + 0x8000 >> 16);
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reloc_addr[2] = OPCODE_MTCTR (11);
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reloc_addr[3] = OPCODE_BCTR ();
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}
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else
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{
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Elf32_Word num_plt_entries;
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num_plt_entries = (map->l_info[DT_PLTRELSZ]->d_un.d_val
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/ sizeof(Elf32_Rela));
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plt[index+PLT_DATA_START_WORDS (num_plt_entries)] = finaladdr;
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reloc_addr[0] = OPCODE_LI (11, index*4);
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reloc_addr[1] = OPCODE_B (-(4*(index*2
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+ 1
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- PLT_LONGBRANCH_ENTRY_WORDS
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+ PLT_INITIAL_ENTRY_WORDS)));
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reloc_addr += 1; /* This is the modified address. */
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}
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}
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MODIFIED_CODE (reloc_addr);
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}
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void
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__process_machine_rela (struct link_map *map,
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const Elf32_Rela *reloc,
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const Elf32_Sym *sym,
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const Elf32_Sym *refsym,
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Elf32_Addr *const reloc_addr,
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Elf32_Addr const finaladdr,
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int rinfo)
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{
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switch (rinfo)
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{
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case R_PPC_NONE:
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return;
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case R_PPC_ADDR32:
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case R_PPC_UADDR32:
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case R_PPC_GLOB_DAT:
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case R_PPC_RELATIVE:
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*reloc_addr = finaladdr;
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return;
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case R_PPC_ADDR24:
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if (finaladdr > 0x01fffffc && finaladdr < 0xfe000000)
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{
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_dl_signal_error(0, map->l_name,
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"R_PPC_ADDR24 relocation out of range");
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}
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*reloc_addr = *reloc_addr & 0xfc000003 | finaladdr & 0x3fffffc;
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break;
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case R_PPC_ADDR16:
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case R_PPC_UADDR16:
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if (finaladdr > 0x7fff && finaladdr < 0x8000)
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{
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_dl_signal_error(0, map->l_name,
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"R_PPC_ADDR16 relocation out of range");
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}
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*(Elf32_Half*) reloc_addr = finaladdr;
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break;
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case R_PPC_ADDR16_LO:
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*(Elf32_Half*) reloc_addr = finaladdr;
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break;
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case R_PPC_ADDR16_HI:
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*(Elf32_Half*) reloc_addr = finaladdr >> 16;
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break;
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case R_PPC_ADDR16_HA:
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*(Elf32_Half*) reloc_addr = (finaladdr + 0x8000) >> 16;
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break;
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case R_PPC_ADDR14:
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case R_PPC_ADDR14_BRTAKEN:
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case R_PPC_ADDR14_BRNTAKEN:
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if (finaladdr > 0x7fff && finaladdr < 0x8000)
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{
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_dl_signal_error(0, map->l_name,
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"R_PPC_ADDR14 relocation out of range");
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}
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*reloc_addr = *reloc_addr & 0xffff0003 | finaladdr & 0xfffc;
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if (rinfo != R_PPC_ADDR14)
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*reloc_addr = (*reloc_addr & 0xffdfffff
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| (rinfo == R_PPC_ADDR14_BRTAKEN
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^ finaladdr >> 31) << 21);
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break;
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case R_PPC_REL24:
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{
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Elf32_Sword delta = finaladdr - (Elf32_Word) (char *) reloc_addr;
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if (delta << 6 >> 6 != delta)
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{
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_dl_signal_error(0, map->l_name,
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"R_PPC_REL24 relocation out of range");
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}
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*reloc_addr = *reloc_addr & 0xfc000003 | delta & 0x3fffffc;
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}
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break;
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case R_PPC_COPY:
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if (sym == NULL)
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/* This can happen in trace mode when an object could not be
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found. */
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return;
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if (sym->st_size > refsym->st_size
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|| (_dl_verbose && sym->st_size < refsym->st_size))
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{
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const char *strtab;
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strtab = ((void *) map->l_addr
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+ map->l_info[DT_STRTAB]->d_un.d_ptr);
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_dl_sysdep_error (_dl_argv[0] ?: "<program name unknown>",
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": Symbol `", strtab + refsym->st_name,
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"' has different size in shared object, "
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"consider re-linking\n", NULL);
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}
|
|
memcpy (reloc_addr, (char *) finaladdr, MIN (sym->st_size,
|
|
refsym->st_size));
|
|
return;
|
|
|
|
case R_PPC_REL32:
|
|
*reloc_addr = finaladdr - (Elf32_Word) (char *) reloc_addr;
|
|
return;
|
|
|
|
case R_PPC_JMP_SLOT:
|
|
elf_machine_fixup_plt(map, reloc, reloc_addr, finaladdr);
|
|
return;
|
|
|
|
default:
|
|
_dl_sysdep_error (_dl_argv[0] ?: "<program name unknown>",
|
|
": Unknown relocation type\n", NULL);
|
|
return;
|
|
}
|
|
|
|
MODIFIED_CODE_NOQUEUE (reloc_addr);
|
|
}
|