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https://sourceware.org/git/glibc.git
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f06a4faf8a
This patch adds an optimized POWER8 st{r,p}ncpy using unaligned accesses.
It shows 10%-80% improvement over the optimized POWER7 one that uses
only aligned accesses, specially on unaligned inputs.
The algorithm first read and check 16 bytes (if inputs do not cross a 4K
page size). The it realign source to 16-bytes and issue a 16 bytes read
and compare loop to speedup null byte checks for large strings. Also,
different from POWER7 optimization, the null pad is done inline in the
implementation using possible unaligned accesses, instead of realying on
a memset call. Special case is added for page cross reads.
425 lines
9.3 KiB
ArmAsm
425 lines
9.3 KiB
ArmAsm
/* Optimized strncpy/stpncpy implementation for PowerPC64/POWER8.
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Copyright (C) 2015 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#ifdef USE_AS_STPNCPY
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# define FUNC_NAME __stpncpy
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#else
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# define FUNC_NAME strncpy
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#endif
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/* Implements the function
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char * [r3] strncpy (char *dest [r3], const char *src [r4], size_t n [r5])
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or
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char * [r3] stpncpy (char *dest [r3], const char *src [r4], size_t n [r5])
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if USE_AS_STPCPY is defined.
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The implementation uses unaligned doubleword access to avoid specialized
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code paths depending of data alignment. Although recent powerpc64 uses
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64K as default, the page cross handling assumes minimum page size of
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4k. */
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.machine power7
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EALIGN (FUNC_NAME, 4, 0)
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/* Check if the [src]+15 will cross a 4K page by checking if the bit
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indicating the page size changes. Basically:
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uint64_t srcin = (uint64_t)src;
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uint64_t ob = srcin & 4096UL;
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uint64_t nb = (srcin+15UL) & 4096UL;
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if (ob ^ nb)
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goto pagecross; */
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addi r10,r4,16
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rlwinm r9,r4,0,19,19
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/* Since it is a leaf function, save some non-volatile registers on the
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protected/red zone. */
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std r26,-48(r1)
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std r27,-40(r1)
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rlwinm r8,r10,0,19,19
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std r28,-32(r1)
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std r29,-24(r1)
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cmpld r7,r9,r8
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std r30,-16(r1)
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std r31,-8(r1)
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beq cr7,L(unaligned_lt_16)
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rldicl r9,r4,0,61
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subfic r8,r9,8
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cmpld cr7,r5,r8
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bgt cr7,L(pagecross)
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/* At this points there is 1 to 15 bytes to check and write. Since it could
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be either from first unaligned 16 bytes access or from bulk copy, the code
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uses an unrolled byte read/write instead of trying to analyze the cmpb
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results. */
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L(short_path):
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mr r9,r3
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L(short_path_1):
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cmpdi cr7,r5,0
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beq cr7,L(short_path_loop_end_1)
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L(short_path_2):
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lbz r10,0(r4)
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cmpdi cr7,r10,0
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stb r10,0(r9)
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beq cr7,L(zero_pad_start_1)
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cmpdi cr0,r5,1
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addi r8,r9,1
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addi r6,r5,-1
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beq cr0,L(short_path_loop_end_0)
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lbz r10,1(r4)
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cmpdi cr7,r10,0
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stb r10,1(r9)
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beq cr7,L(zero_pad_start_prepare_1)
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addi r10,r5,-3
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b L(short_path_loop_1)
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.align 4
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L(short_path_loop):
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lbz r8,0(r4)
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addi r7,r10,-2
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cmpdi cr5,r8,0
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stb r8,0(r9)
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beq cr5,L(zero_pad_start_1)
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beq r7,L(short_path_loop_end_0)
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lbz r8,1(r4)
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cmpdi cr7,r8,0
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stb r8,1(r9)
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beq cr7,L(zero_pad_start)
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mr r10,r7
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L(short_path_loop_1):
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addic. r5,r5,-2
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addi r9,r9,2
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cmpdi cr7,r10,0
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addi r4,r4,2
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addi r6,r9,1
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bne cr0,L(short_path_loop)
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#ifdef USE_AS_STPNCPY
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mr r3,r9
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b L(short_path_loop_end)
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#endif
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L(short_path_loop_end_0):
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#ifdef USE_AS_STPNCPY
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addi r3,r9,1
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b L(short_path_loop_end)
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#endif
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L(short_path_loop_end_1):
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#ifdef USE_AS_STPNCPY
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mr r3,r9
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#endif
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L(short_path_loop_end):
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/* Restore non-volatile registers. */
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ld r26,-48(r1)
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ld r27,-40(r1)
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ld r28,-32(r1)
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ld r29,-24(r1)
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ld r30,-16(r1)
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ld r31,-8(r1)
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blr
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/* This code pads the remainder dest with NULL bytes. The algorithm
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calculate the remanining size and issues a doubleword unrolled
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loops followed by a byte a byte set. */
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.align 4
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L(zero_pad_start):
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mr r5,r10
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mr r9,r6
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L(zero_pad_start_1):
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srdi. r8,r5,r3
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mr r10,r9
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#ifdef USE_AS_STPNCPY
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mr r3,r9
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#endif
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beq- cr0,L(zero_pad_loop_b_start)
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cmpldi cr7,r8,1
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li cr7,0
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std r7,0(r9)
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beq cr7,L(zero_pad_loop_b_prepare)
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addic. r8,r8,-2
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addi r10,r9,r16
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std r7,8(r9)
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beq cr0,L(zero_pad_loop_dw_2)
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std r7,16(r9)
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li r9,0
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b L(zero_pad_loop_dw_1)
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.align 4
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L(zero_pad_loop_dw):
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addi r10,r10,16
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std r9,-8(r10)
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beq cr0,L(zero_pad_loop_dw_2)
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std r9,0(r10)
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L(zero_pad_loop_dw_1):
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cmpldi cr7,r8,1
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std r9,0(r10)
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addic. r8,r8,-2
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bne cr7,L(zero_pad_loop_dw)
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addi r10,r10,8
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L(zero_pad_loop_dw_2):
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rldicl r5,r5,0,61
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L(zero_pad_loop_b_start):
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cmpdi cr7,r5,0
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addi r5,r5,-1
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addi r9,r10,-1
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add r10,r10,5
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subf r10,r9,r10
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li r8,0
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beq- cr7,L(short_path_loop_end)
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/* Write remaining 1-8 bytes. */
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.align 4
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addi r9,r9,1
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mtocrf 0x1,r10
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bf 29,4f
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stw r8,0(r9)
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addi r9,r9,4
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.align 4
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4: bf 30,2f
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sth r8,0(r9)
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addi r9,r9,2
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.align 4
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2: bf 31,1f
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stb r8,0(r9)
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/* Restore non-volatile registers. */
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1: ld r26,-48(r1)
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ld r27,-40(r1)
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ld r28,-32(r1)
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ld r29,-24(r1)
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ld r30,-16(r1)
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ld r31,-8(r1)
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blr
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/* The common case where [src]+16 will not cross a 4K page boundary.
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In this case the code fast check the first 16 bytes by using doubleword
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read/compares and update destiny if neither total size or null byte
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is found in destiny. */
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.align 4
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L(unaligned_lt_16):
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cmpldi cr7,r5,7
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ble cr7,L(short_path)
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ld r7,0(r4)
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li r8,0
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cmpb r8,r7,r8
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cmpdi cr7,r8,0
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bne cr7,L(short_path_prepare_2)
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addi r6,r5,-8
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std r7,0(r3)
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addi r9,r3,r8
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cmpldi cr7,r6,7
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addi r7,r4,8
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ble cr7,L(short_path_prepare_1_1)
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ld r4,8(r4)
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cmpb r8,r4,r8
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cmpdi cr7,r8,0
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bne cr7,L(short_path_prepare_2_1)
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std r4,8(r3)
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addi r29,r3,16
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addi r5,r5,-16
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/* Neither the null byte was found or total length was reached,
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align to 16 bytes and issue a bulk copy/compare. */
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b L(align_to_16b)
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/* In the case of 4k page boundary cross, the algorithm first align
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the address to a doubleword, calculate a mask based on alignment
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to ignore the bytes and continue using doubleword. */
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.align 4
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L(pagecross):
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rldicr r11,r4,0,59 /* Align the address to 8 bytes boundary. */
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li r6,-1 /* MASK = 0xffffffffffffffffUL. */
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sldi r9,r9,3 /* Calculate padding. */
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ld r7,0(r11) /* Load doubleword from memory. */
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#ifdef __LITTLE_ENDIAN__
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sld r9,r6,r9 /* MASK = MASK << padding. */
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#else
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srd r9,r6,r9 /* MASK = MASK >> padding. */
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#endif
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orc r9,r7,r9 /* Mask bits that are not part of the
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string. */
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li cr7,0
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cmpb r9,r9,r7 /* Check for null bytes in DWORD1. */
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cmpdi cr7,r9,0
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bne cr7,L(short_path_prepare_2)
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subf r8,r8,r5 /* Adjust total length. */
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cmpldi cr7,r8,8 /* Check if length was reached. */
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ble cr7,L(short_path_prepare_2)
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/* For next checks we have aligned address, so we check for more
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three doublewords to make sure we can read 16 unaligned bytes
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to start the bulk copy with 16 aligned addresses. */
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ld cr7,8(r11)
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cmpb r9,r7,r9
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cmpdi cr7,r9,0
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bne cr7,L(short_path_prepare_2)
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addi cr7,r8,-8
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cmpldi cr7,r7,8
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ble cr7,L(short_path_prepare_2)
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ld cr7,16(r11)
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cmpb r9,r7,r9
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cmpdi cr7,r9,0
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bne cr7,L(short_path_prepare_2)
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addi r8,r8,-16
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cmpldi r7,r8,8
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ble cr7,L(short_path_prepare_2)
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ld r8,24(r11)
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cmpb r9,r8,r9
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cmpdi r7,r9,0
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bne cr7,L(short_path_prepare_2)
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/* No null byte found in the 32 bytes readed and length not reached,
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read source again using unaligned loads and store them. */
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ld r9,0(r4)
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addi r29,r3,16
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addi r5,r5,-16
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std r9,0(r3)
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ld r9,8(r4)
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std r9,8(r3)
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/* Align source to 16 bytes and adjust destiny and size. */
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L(align_to_16b):
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rldicl r9,r10,0,60
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rldicr r28,r10,0,59
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add r12,r5,r9
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subf r29,r9,r29
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/* The bulk read/compare/copy loads two doublewords, compare and merge
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in a single register for speed. This is an attempt to speed up the
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null-checking process for bigger strings. */
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cmpldi cr7,r12,15
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ble cr7,L(short_path_prepare_1_2)
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/* Main loop for large sizes, unrolled 2 times to get better use of
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pipeline. */
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ld r8,0(28)
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ld r10,8(28)
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li r9,0
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cmpb r7,r8,r9
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cmpb r9,r10,r9
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or. r6,r9,r7
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bne cr0,L(short_path_prepare_2_3)
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addi r5,r12,-16
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addi r4,r28,16
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std r8,0(r29)
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std r10,8(r29)
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cmpldi cr7,r5,15
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addi r9,r29,16
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ble cr7,L(short_path_1)
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mr r11,r28
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mr r6,r29
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li r30,0
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subfic r26,r4,48
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subfic r27,r9,48
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b L(loop_16b)
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.align 4
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L(loop_start):
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ld r31,0(r11)
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ld r10,8(r11)
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cmpb r0,r31,r7
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cmpb r8,r10,r7
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or. r7,r0,r8
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addi r5,r5,-32
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cmpldi cr7,r5,15
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add r4,r4,r26
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add r9,r9,r27
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bne cr0,L(short_path_prepare_2_2)
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add r4,r28,r4
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std r31,0(r6)
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add r9,r29,r9
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std r10,8(r6)
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ble cr7,L(short_path_1)
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L(loop_16b):
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ld r10,16(r11)
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ld r0,24(r11)
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cmpb r8,r10,r30
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cmpb r7,r0,r30
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or. r7,r8,r7
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addi r12,r12,-32
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cmpldi r7,r12,15
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addi r11,r11,32
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bne cr0,L(short_path_2)
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std r10,16(r6)
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addi r6,r6,32
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std r0,-8(r6)
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bgt cr7,L(loop_start)
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mr r5,r12
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mr r4,r11
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mr r9,r6
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b L(short_path_1)
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.align 4
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L(short_path_prepare_1_1):
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mr r5,r6
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mr r4,r7
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b L(short_path_1)
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L(short_path_prepare_1_2):
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mr r5,r12
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mr r4,r28
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mr r9,r29
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b L(short_path_1)
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L(short_path_prepare_2):
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mr r9,r3
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b L(short_path_2)
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L(short_path_prepare_2_1):
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mr r5,r6
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mr r4,r7
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b L(short_path_2)
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L(short_path_prepare_2_2):
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mr r5,r12
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mr r4,r11
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mr r9,r6
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b L(short_path_2)
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L(short_path_prepare_2_3):
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mr r5,r12
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mr r4,r28
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mr r9,r29
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b L(short_path_2)
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L(zero_pad_loop_b_prepare):
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addi r10,r9,8
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rldicl r5,r5,0,61
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b L(zero_pad_loop_b_start)
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L(zero_pad_start_prepare_1):
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mr r5,r6
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mr r9,r8
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b L(zero_pad_start_1)
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END (FUNC_NAME)
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#ifdef USE_AS_STPNCPY
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libc_hidden_def (__stpncpy)
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#else
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libc_hidden_builtin_def (strncpy)
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#endif
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