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75eff3fe90
This patch moves the AArch64 port to the main sysdeps hierarchy. The move is essentially: git mv ports/sysdeps/aarch64 sysdeps/aarch64 git mv ports/sysdeps/unix/sysv/linux/aarch64 sysdeps/unix/sysv/linux/aarch64 The README is updated and I've updated ChangeLog.aarch64 along the lines of the ARM move. The AArch64 build has been tested to confirm that there were no changes in objdump -dr output or the shared objects.
156 lines
4.6 KiB
ArmAsm
156 lines
4.6 KiB
ArmAsm
/* Copyright (C) 2012-2014 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<http://www.gnu.org/licenses/>. */
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/* Assumptions:
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*
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* ARMv8-a, AArch64
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*/
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#include <sysdep.h>
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#define REP8_01 0x0101010101010101
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#define REP8_7f 0x7f7f7f7f7f7f7f7f
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#define REP8_80 0x8080808080808080
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/* Parameters and result. */
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#define src1 x0
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#define src2 x1
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#define result x0
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/* Internal variables. */
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#define data1 x2
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#define data1w w2
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#define data2 x3
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#define data2w w3
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#define has_nul x4
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#define diff x5
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#define syndrome x6
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#define tmp1 x7
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#define tmp2 x8
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#define tmp3 x9
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#define zeroones x10
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#define pos x11
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/* Start of performance-critical section -- one 64B cache line. */
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ENTRY_ALIGN(strcmp, 6)
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eor tmp1, src1, src2
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mov zeroones, #REP8_01
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tst tmp1, #7
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b.ne L(misaligned8)
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ands tmp1, src1, #7
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b.ne L(mutual_align)
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/* NUL detection works on the principle that (X - 1) & (~X) & 0x80
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(=> (X - 1) & ~(X | 0x7f)) is non-zero iff a byte is zero, and
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can be done in parallel across the entire word. */
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L(loop_aligned):
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ldr data1, [src1], #8
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ldr data2, [src2], #8
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L(start_realigned):
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sub tmp1, data1, zeroones
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orr tmp2, data1, #REP8_7f
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eor diff, data1, data2 /* Non-zero if differences found. */
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bic has_nul, tmp1, tmp2 /* Non-zero if NUL terminator. */
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orr syndrome, diff, has_nul
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cbz syndrome, L(loop_aligned)
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/* End of performance-critical section -- one 64B cache line. */
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#ifndef __AARCH64EB__
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rev syndrome, syndrome
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rev data1, data1
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/* The MS-non-zero bit of the syndrome marks either the first bit
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that is different, or the top bit of the first zero byte.
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Shifting left now will bring the critical information into the
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top bits. */
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clz pos, syndrome
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rev data2, data2
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lsl data1, data1, pos
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lsl data2, data2, pos
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/* But we need to zero-extend (char is unsigned) the value and then
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perform a signed 32-bit subtraction. */
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lsr data1, data1, #56
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sub result, data1, data2, lsr #56
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RET
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#else
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/* For big-endian we cannot use the trick with the syndrome value
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as carry-propagation can corrupt the upper bits if the trailing
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bytes in the string contain 0x01. */
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/* However, if there is no NUL byte in the dword, we can generate
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the result directly. We can't just subtract the bytes as the
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MSB might be significant. */
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cbnz has_nul, 1f
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cmp data1, data2
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cset result, ne
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cneg result, result, lo
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RET
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1:
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/* Re-compute the NUL-byte detection, using a byte-reversed value. */
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rev tmp3, data1
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sub tmp1, tmp3, zeroones
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orr tmp2, tmp3, #REP8_7f
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bic has_nul, tmp1, tmp2
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rev has_nul, has_nul
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orr syndrome, diff, has_nul
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clz pos, syndrome
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/* The MS-non-zero bit of the syndrome marks either the first bit
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that is different, or the top bit of the first zero byte.
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Shifting left now will bring the critical information into the
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top bits. */
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lsl data1, data1, pos
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lsl data2, data2, pos
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/* But we need to zero-extend (char is unsigned) the value and then
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perform a signed 32-bit subtraction. */
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lsr data1, data1, #56
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sub result, data1, data2, lsr #56
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RET
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#endif
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L(mutual_align):
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/* Sources are mutually aligned, but are not currently at an
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alignment boundary. Round down the addresses and then mask off
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the bytes that preceed the start point. */
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bic src1, src1, #7
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bic src2, src2, #7
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lsl tmp1, tmp1, #3 /* Bytes beyond alignment -> bits. */
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ldr data1, [src1], #8
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neg tmp1, tmp1 /* Bits to alignment -64. */
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ldr data2, [src2], #8
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mov tmp2, #~0
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#ifdef __AARCH64EB__
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/* Big-endian. Early bytes are at MSB. */
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lsl tmp2, tmp2, tmp1 /* Shift (tmp1 & 63). */
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#else
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/* Little-endian. Early bytes are at LSB. */
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lsr tmp2, tmp2, tmp1 /* Shift (tmp1 & 63). */
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#endif
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orr data1, data1, tmp2
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orr data2, data2, tmp2
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b L(start_realigned)
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L(misaligned8):
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/* We can do better than this. */
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ldrb data1w, [src1], #1
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ldrb data2w, [src2], #1
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cmp data1w, #1
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ccmp data1w, data2w, #0, cs /* NZCV = 0b0000. */
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b.eq L(misaligned8)
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sub result, data1, data2
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RET
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END(strcmp)
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libc_hidden_builtin_def (strcmp)
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