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140 lines
3.9 KiB
C
140 lines
3.9 KiB
C
/* Internal math stuff. MIPS version.
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Copyright (C) 2013-2014 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#ifndef _MATH_PRIVATE_H
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#ifdef __mips_nan2008
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/* MIPS aligned to IEEE 754-2008. */
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#else
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/* One of the few architectures where the meaning of the quiet/signaling bit is
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inverse to IEEE 754-2008 (as well as common practice for IEEE 754-1985). */
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# define HIGH_ORDER_BIT_IS_SET_FOR_SNAN
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#endif
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/* Inline functions to speed up the math library implementation. The
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default versions of these routines are in generic/math_private.h
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and call fesetround, feholdexcept, etc. These routines use inlined
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code instead. */
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#ifdef __mips_hard_float
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# include <fenv.h>
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# include <fenv_libc.h>
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# include <fpu_control.h>
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static __always_inline void
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libc_feholdexcept_mips (fenv_t *envp)
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{
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fpu_control_t cw;
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/* Save the current state. */
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_FPU_GETCW (cw);
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envp->__fp_control_register = cw;
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/* Clear all exception enable bits and flags. */
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cw &= ~(_FPU_MASK_V|_FPU_MASK_Z|_FPU_MASK_O|_FPU_MASK_U|_FPU_MASK_I|FE_ALL_EXCEPT);
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_FPU_SETCW (cw);
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}
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# define libc_feholdexcept libc_feholdexcept_mips
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# define libc_feholdexceptf libc_feholdexcept_mips
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# define libc_feholdexceptl libc_feholdexcept_mips
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static __always_inline void
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libc_fesetround_mips (int round)
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{
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fpu_control_t cw;
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/* Get current state. */
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_FPU_GETCW (cw);
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/* Set rounding bits. */
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cw &= ~_FPU_RC_MASK;
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cw |= round;
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/* Set new state. */
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_FPU_SETCW (cw);
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}
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# define libc_fesetround libc_fesetround_mips
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# define libc_fesetroundf libc_fesetround_mips
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# define libc_fesetroundl libc_fesetround_mips
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static __always_inline void
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libc_feholdexcept_setround_mips (fenv_t *envp, int round)
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{
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fpu_control_t cw;
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/* Save the current state. */
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_FPU_GETCW (cw);
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envp->__fp_control_register = cw;
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/* Clear all exception enable bits and flags. */
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cw &= ~(_FPU_MASK_V|_FPU_MASK_Z|_FPU_MASK_O|_FPU_MASK_U|_FPU_MASK_I|FE_ALL_EXCEPT);
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/* Set rounding bits. */
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cw &= ~_FPU_RC_MASK;
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cw |= round;
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/* Set new state. */
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_FPU_SETCW (cw);
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}
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# define libc_feholdexcept_setround libc_feholdexcept_setround_mips
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# define libc_feholdexcept_setroundf libc_feholdexcept_setround_mips
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# define libc_feholdexcept_setroundl libc_feholdexcept_setround_mips
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static __always_inline void
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libc_fesetenv_mips (fenv_t *envp)
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{
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fpu_control_t cw;
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/* Read current state to flush fpu pipeline. */
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_FPU_GETCW (cw);
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_FPU_SETCW (envp->__fp_control_register);
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}
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# define libc_fesetenv libc_fesetenv_mips
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# define libc_fesetenvf libc_fesetenv_mips
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# define libc_fesetenvl libc_fesetenv_mips
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static __always_inline void
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libc_feupdateenv_mips (fenv_t *envp)
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{
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int temp;
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/* Save current exceptions. */
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_FPU_GETCW (temp);
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/* Set flag bits (which are accumulative), and *also* set the
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cause bits. The setting of the cause bits is what actually causes
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the hardware to generate the exception, if the corresponding enable
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bit is set as well. */
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temp &= FE_ALL_EXCEPT;
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temp |= envp->__fp_control_register | (temp << CAUSE_SHIFT);
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/* Set new state. */
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_FPU_SETCW (temp);
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}
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# define libc_feupdateenv libc_feupdateenv_mips
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# define libc_feupdateenvf libc_feupdateenv_mips
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# define libc_feupdateenvl libc_feupdateenv_mips
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#endif
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#include_next <math_private.h>
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#endif
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