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222 lines
7.0 KiB
C
222 lines
7.0 KiB
C
/* Machine-dependent software floating-point definitions.
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Sparc userland (_Q_*) version.
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Copyright (C) 1997,1998,1999 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by Richard Henderson (rth@cygnus.com),
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Jakub Jelinek (jj@ultra.linux.cz) and
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David S. Miller (davem@redhat.com).
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Library General Public License as
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published by the Free Software Foundation; either version 2 of the
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License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Library General Public License for more details.
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You should have received a copy of the GNU Library General Public
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License along with the GNU C Library; see the file COPYING.LIB. If
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not, write to the Free Software Foundation, Inc.,
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59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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#include <fpu_control.h>
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#define _FP_W_TYPE_SIZE 32
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#define _FP_W_TYPE unsigned long
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#define _FP_WS_TYPE signed long
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#define _FP_I_TYPE long
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#define _FP_MUL_MEAT_S(R,X,Y) \
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_FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm)
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#define _FP_MUL_MEAT_D(R,X,Y) \
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_FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm)
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#define _FP_MUL_MEAT_Q(R,X,Y) \
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_FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm)
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#define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_udiv(S,R,X,Y)
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#define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y)
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#define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y)
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#define _FP_NANFRAC_S ((_FP_QNANBIT_S << 1) - 1)
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#define _FP_NANFRAC_D ((_FP_QNANBIT_D << 1) - 1), -1
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#define _FP_NANFRAC_Q ((_FP_QNANBIT_Q << 1) - 1), -1, -1, -1
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#define _FP_NANSIGN_S 0
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#define _FP_NANSIGN_D 0
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#define _FP_NANSIGN_Q 0
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#define _FP_KEEPNANFRACP 1
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/* If one NaN is signaling and the other is not,
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* we choose that one, otherwise we choose X.
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*/
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/* For _Qp_* and _Q_*, this should prefer X, for
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* CPU instruction emulation this should prefer Y.
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* (see SPAMv9 B.2.2 section).
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*/
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#define _FP_CHOOSENAN(fs, wc, R, X, Y, OP) \
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do { \
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if ((_FP_FRAC_HIGH_RAW_##fs(X) & _FP_QNANBIT_##fs) \
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&& !(_FP_FRAC_HIGH_RAW_##fs(Y) & _FP_QNANBIT_##fs)) \
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{ \
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R##_s = Y##_s; \
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_FP_FRAC_COPY_##wc(R,Y); \
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} \
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else \
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{ \
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R##_s = X##_s; \
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_FP_FRAC_COPY_##wc(R,X); \
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} \
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R##_c = FP_CLS_NAN; \
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} while (0)
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/* Some assembly to speed things up. */
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#define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \
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__asm__ ("addcc %r7,%8,%2
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addxcc %r5,%6,%1
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addx %r3,%4,%0" \
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: "=r" ((USItype)(r2)), \
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"=&r" ((USItype)(r1)), \
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"=&r" ((USItype)(r0)) \
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: "%rJ" ((USItype)(x2)), \
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"rI" ((USItype)(y2)), \
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"%rJ" ((USItype)(x1)), \
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"rI" ((USItype)(y1)), \
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"%rJ" ((USItype)(x0)), \
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"rI" ((USItype)(y0)) \
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: "cc")
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#define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \
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__asm__ ("subcc %r7,%8,%2
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subxcc %r5,%6,%1
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subx %r3,%4,%0" \
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: "=r" ((USItype)(r2)), \
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"=&r" ((USItype)(r1)), \
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"=&r" ((USItype)(r0)) \
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: "%rJ" ((USItype)(x2)), \
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"rI" ((USItype)(y2)), \
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"%rJ" ((USItype)(x1)), \
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"rI" ((USItype)(y1)), \
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"%rJ" ((USItype)(x0)), \
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"rI" ((USItype)(y0)) \
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: "cc")
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#define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \
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do { \
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/* We need to fool gcc, as we need to pass more than 10 \
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input/outputs. */ \
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register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2"); \
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__asm__ __volatile__ ("
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addcc %r8,%9,%1
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addxcc %r6,%7,%0
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addxcc %r4,%5,%%g2
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addx %r2,%3,%%g1" \
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: "=&r" ((USItype)(r1)), \
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"=&r" ((USItype)(r0)) \
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: "%rJ" ((USItype)(x3)), \
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"rI" ((USItype)(y3)), \
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"%rJ" ((USItype)(x2)), \
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"rI" ((USItype)(y2)), \
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"%rJ" ((USItype)(x1)), \
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"rI" ((USItype)(y1)), \
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"%rJ" ((USItype)(x0)), \
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"rI" ((USItype)(y0)) \
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: "cc", "g1", "g2"); \
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__asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2)); \
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r3 = _t1; r2 = _t2; \
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} while (0)
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#define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \
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do { \
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/* We need to fool gcc, as we need to pass more than 10 \
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input/outputs. */ \
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register USItype _t1 __asm__ ("g1"), _t2 __asm__ ("g2"); \
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__asm__ __volatile__ ("
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subcc %r8,%9,%1
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subxcc %r6,%7,%0
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subxcc %r4,%5,%%g2
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subx %r2,%3,%%g1" \
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: "=&r" ((USItype)(r1)), \
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"=&r" ((USItype)(r0)) \
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: "%rJ" ((USItype)(x3)), \
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"rI" ((USItype)(y3)), \
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"%rJ" ((USItype)(x2)), \
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"rI" ((USItype)(y2)), \
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"%rJ" ((USItype)(x1)), \
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"rI" ((USItype)(y1)), \
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"%rJ" ((USItype)(x0)), \
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"rI" ((USItype)(y0)) \
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: "cc", "g1", "g2"); \
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__asm__ __volatile__ ("" : "=r" (_t1), "=r" (_t2)); \
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r3 = _t1; r2 = _t2; \
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} while (0)
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#define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0)
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#define __FP_FRAC_DEC_4(x3,x2,x1,x0,y3,y2,y1,y0) __FP_FRAC_SUB_4(x3,x2,x1,x0,x3,x2,x1,x0,y3,y2,y1,y0)
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#define __FP_FRAC_ADDI_4(x3,x2,x1,x0,i) \
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__asm__ ("addcc %3,%4,%3
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addxcc %2,%%g0,%2
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addxcc %1,%%g0,%1
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addx %0,%%g0,%0" \
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: "=&r" ((USItype)(x3)), \
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"=&r" ((USItype)(x2)), \
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"=&r" ((USItype)(x1)), \
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"=&r" ((USItype)(x0)) \
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: "rI" ((USItype)(i)), \
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"0" ((USItype)(x3)), \
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"1" ((USItype)(x2)), \
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"2" ((USItype)(x1)), \
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"3" ((USItype)(x0)) \
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: "cc")
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/* Obtain the current rounding mode. */
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#ifndef FP_ROUNDMODE
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#define FP_ROUNDMODE ((_fcw >> 30) & 0x3)
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#endif
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/* Exception flags. */
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#define FP_EX_INVALID (1 << 4)
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#define FP_EX_OVERFLOW (1 << 3)
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#define FP_EX_UNDERFLOW (1 << 2)
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#define FP_EX_DIVZERO (1 << 1)
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#define FP_EX_INEXACT (1 << 0)
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#define _FP_DECL_EX fpu_control_t _fcw
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#define FP_INIT_ROUNDMODE \
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do { \
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_FPU_GETCW(_fcw); \
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} while (0)
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/* Simulate exceptions using double arithmetics. */
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extern double ___Q_simulate_exceptions(int exc);
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#define FP_HANDLE_EXCEPTIONS \
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do { \
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if (!_fex) \
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{ \
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/* This is the common case, so we do it inline. \
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* We need to clear cexc bits if any. \
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*/ \
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extern unsigned long long ___Q_numbers[]; \
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__asm__ __volatile__("
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ldd [%0], %%f30
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faddd %%f30, %%f30, %%f30
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" : : "r" (___Q_numbers) : "f30"); \
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} \
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else \
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{ \
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__asm__ __volatile__("
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mov %0, %%o0
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mov %%o7, %%g1
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call ___Q_simulate_exceptions
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mov %%g1, %%o7
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" : : "r" (_fex) : \
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"g1", "g2", "g3", "g4", "g5", "o0", \
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"o1", "o2", "o3", "o4", "o5", "cc"); \
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} \
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} while (0)
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