mirror of
https://sourceware.org/git/glibc.git
synced 2024-11-30 00:31:08 +00:00
5a82c74822
Also, change sources.redhat.com to sourceware.org.
This patch was automatically generated by running the following shell
script, which uses GNU sed, and which avoids modifying files imported
from upstream:
sed -ri '
s,(http|ftp)(://(.*\.)?(gnu|fsf|sourceware)\.org($|[^.]|\.[^a-z])),https\2,g
s,(http|ftp)(://(.*\.)?)sources\.redhat\.com($|[^.]|\.[^a-z]),https\2sourceware.org\4,g
' \
$(find $(git ls-files) -prune -type f \
! -name '*.po' \
! -name 'ChangeLog*' \
! -path COPYING ! -path COPYING.LIB \
! -path manual/fdl-1.3.texi ! -path manual/lgpl-2.1.texi \
! -path manual/texinfo.tex ! -path scripts/config.guess \
! -path scripts/config.sub ! -path scripts/install-sh \
! -path scripts/mkinstalldirs ! -path scripts/move-if-change \
! -path INSTALL ! -path locale/programs/charmap-kw.h \
! -path po/libc.pot ! -path sysdeps/gnu/errlist.c \
! '(' -name configure \
-execdir test -f configure.ac -o -f configure.in ';' ')' \
! '(' -name preconfigure \
-execdir test -f preconfigure.ac ';' ')' \
-print)
and then by running 'make dist-prepare' to regenerate files built
from the altered files, and then executing the following to cleanup:
chmod a+x sysdeps/unix/sysv/linux/riscv/configure
# Omit irrelevant whitespace and comment-only changes,
# perhaps from a slightly-different Autoconf version.
git checkout -f \
sysdeps/csky/configure \
sysdeps/hppa/configure \
sysdeps/riscv/configure \
sysdeps/unix/sysv/linux/csky/configure
# Omit changes that caused a pre-commit check to fail like this:
# remote: *** error: sysdeps/powerpc/powerpc64/ppc-mcount.S: trailing lines
git checkout -f \
sysdeps/powerpc/powerpc64/ppc-mcount.S \
sysdeps/unix/sysv/linux/s390/s390-64/syscall.S
# Omit change that caused a pre-commit check to fail like this:
# remote: *** error: sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S: last line does not end in newline
git checkout -f sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S
436 lines
11 KiB
ArmAsm
436 lines
11 KiB
ArmAsm
/* Optimized version of the standard memcpy() function.
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This file is part of the GNU C Library.
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Copyright (C) 2000-2019 Free Software Foundation, Inc.
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Contributed by Dan Pop for Itanium <Dan.Pop@cern.ch>.
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Rewritten for McKinley by Sverre Jarp, HP Labs/CERN <Sverre.Jarp@cern.ch>
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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/* Return: dest
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Inputs:
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in0: dest
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in1: src
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in2: byte count
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An assembly implementation of the algorithm used by the generic C
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version from glibc. The case when source and sest are aligned is
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treated separately, for extra performance.
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In this form, memcpy assumes little endian mode. For big endian mode,
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sh1 must be computed using an extra instruction: sub sh1 = 64, sh1
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and the order of r[MEMLAT] and r[MEMLAT+1] must be reverted in the
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shrp instruction. */
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#define USE_LFETCH
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#define USE_FLP
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#include <sysdep.h>
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#undef ret
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#define LFETCH_DIST 500
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#define ALIGN_UNROLL_no 4 // no. of elements
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#define ALIGN_UNROLL_sh 2 // (shift amount)
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#define MEMLAT 8
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#define Nrot ((4*(MEMLAT+2) + 7) & ~7)
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#define OP_T_THRES 16
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#define OPSIZ 8
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#define loopcnt r14
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#define elemcnt r15
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#define saved_pr r16
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#define saved_lc r17
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#define adest r18
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#define dest r19
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#define asrc r20
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#define src r21
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#define len r22
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#define tmp2 r23
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#define tmp3 r24
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#define tmp4 r25
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#define ptable r26
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#define ploop56 r27
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#define loopaddr r28
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#define sh1 r29
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#define ptr1 r30
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#define ptr2 r31
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#define movi0 mov
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#define p_scr p6
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#define p_xtr p7
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#define p_nxtr p8
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#define p_few p9
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#if defined(USE_FLP)
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#define load ldf8
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#define store stf8
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#define tempreg f6
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#define the_r fr
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#define the_s fs
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#define the_t ft
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#define the_q fq
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#define the_w fw
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#define the_x fx
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#define the_y fy
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#define the_z fz
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#elif defined(USE_INT)
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#define load ld8
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#define store st8
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#define tempreg tmp2
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#define the_r r
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#define the_s s
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#define the_t t
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#define the_q q
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#define the_w w
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#define the_x x
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#define the_y y
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#define the_z z
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#endif
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#ifdef GAS_ALIGN_BREAKS_UNWIND_INFO
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/* Manually force proper loop-alignment. Note: be sure to
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double-check the code-layout after making any changes to
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this routine! */
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# define ALIGN(n) { nop 0 }
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#else
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# define ALIGN(n) .align n
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#endif
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#if defined(USE_LFETCH)
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#define LOOP(shift) \
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ALIGN(32); \
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.loop##shift##: \
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{ .mmb \
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(p[0]) ld8.nt1 r[0] = [asrc], 8 ; \
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(p[0]) lfetch.nt1 [ptr1], 16 ; \
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nop.b 0 ; \
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} { .mib \
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(p[MEMLAT+1]) st8 [dest] = tmp3, 8 ; \
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(p[MEMLAT]) shrp tmp3 = r[MEMLAT], s[MEMLAT+1], shift ; \
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nop.b 0 ;; \
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} { .mmb \
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(p[0]) ld8.nt1 s[0] = [asrc], 8 ; \
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(p[0]) lfetch.nt1 [ptr2], 16 ; \
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nop.b 0 ; \
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} { .mib \
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(p[MEMLAT+1]) st8 [dest] = tmp4, 8 ; \
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(p[MEMLAT]) shrp tmp4 = s[MEMLAT], r[MEMLAT], shift ; \
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br.ctop.sptk.many .loop##shift \
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;; } \
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{ .mib \
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br.cond.sptk.many .copy_bytes ; /* deal with the remaining bytes */ \
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}
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#else
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#define LOOP(shift) \
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ALIGN(32); \
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.loop##shift##: \
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{ .mmb \
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(p[0]) ld8.nt1 r[0] = [asrc], 8 ; \
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nop.b 0 ; \
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} { .mib \
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(p[MEMLAT+1]) st8 [dest] = tmp3, 8 ; \
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(p[MEMLAT]) shrp tmp3 = r[MEMLAT], s[MEMLAT+1], shift ; \
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nop.b 0 ;; \
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} { .mmb \
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(p[0]) ld8.nt1 s[0] = [asrc], 8 ; \
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nop.b 0 ; \
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} { .mib \
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(p[MEMLAT+1]) st8 [dest] = tmp4, 8 ; \
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(p[MEMLAT]) shrp tmp4 = s[MEMLAT], r[MEMLAT], shift ; \
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br.ctop.sptk.many .loop##shift \
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;; } \
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{ .mib \
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br.cond.sptk.many .copy_bytes ; /* deal with the remaining bytes */ \
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}
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#endif
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ENTRY(memcpy)
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{ .mmi
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.prologue
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alloc r2 = ar.pfs, 3, Nrot - 3, 0, Nrot
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.rotr r[MEMLAT+1], s[MEMLAT+2], q[MEMLAT+1], t[MEMLAT+1]
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.rotp p[MEMLAT+2]
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.rotf fr[MEMLAT+1], fq[MEMLAT+1], fs[MEMLAT+1], ft[MEMLAT+1]
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mov ret0 = in0 // return tmp2 = dest
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.save pr, saved_pr
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movi0 saved_pr = pr // save the predicate registers
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} { .mmi
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and tmp4 = 7, in0 // check if destination is aligned
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mov dest = in0 // dest
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mov src = in1 // src
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;; }
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{ .mii
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cmp.eq p_scr, p0 = in2, r0 // if (len == 0)
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.save ar.lc, saved_lc
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movi0 saved_lc = ar.lc // save the loop counter
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.body
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cmp.ge p_few, p0 = OP_T_THRES, in2 // is len <= OP_T_THRESH
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} { .mbb
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mov len = in2 // len
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(p_scr) br.cond.dpnt.few .restore_and_exit // Branch no. 1: return dest
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(p_few) br.cond.dpnt.many .copy_bytes // Branch no. 2: copy byte by byte
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;; }
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{ .mmi
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#if defined(USE_LFETCH)
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lfetch.nt1 [dest] //
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lfetch.nt1 [src] //
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#endif
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shr.u elemcnt = len, 3 // elemcnt = len / 8
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} { .mib
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cmp.eq p_scr, p0 = tmp4, r0 // is destination aligned?
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sub loopcnt = 7, tmp4 //
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(p_scr) br.cond.dptk.many .dest_aligned
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;; }
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{ .mmi
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ld1 tmp2 = [src], 1 //
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sub len = len, loopcnt, 1 // reduce len
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movi0 ar.lc = loopcnt //
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} { .mib
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cmp.ne p_scr, p0 = 0, loopcnt // avoid loading beyond end-point
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;; }
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.l0: // ---------------------------- // L0: Align src on 8-byte boundary
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{ .mmi
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st1 [dest] = tmp2, 1 //
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(p_scr) ld1 tmp2 = [src], 1 //
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} { .mib
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cmp.lt p_scr, p0 = 1, loopcnt // avoid load beyond end-point
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add loopcnt = -1, loopcnt
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br.cloop.dptk.few .l0 //
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;; }
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.dest_aligned:
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{ .mmi
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and tmp4 = 7, src // ready for alignment check
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shr.u elemcnt = len, 3 // elemcnt = len / 8
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;; }
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{ .mib
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cmp.ne p_scr, p0 = tmp4, r0 // is source also aligned
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tbit.nz p_xtr, p_nxtr = src, 3 // prepare a separate move if src
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} { .mib // is not 16B aligned
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add ptr2 = LFETCH_DIST, dest // prefetch address
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add ptr1 = LFETCH_DIST, src
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(p_scr) br.cond.dptk.many .src_not_aligned
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;; }
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// The optimal case, when dest, and src are aligned
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.both_aligned:
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{ .mmi
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.pred.rel "mutex",p_xtr,p_nxtr
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(p_xtr) cmp.gt p_scr, p0 = ALIGN_UNROLL_no+1, elemcnt // Need N + 1 to qualify
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(p_nxtr) cmp.gt p_scr, p0 = ALIGN_UNROLL_no, elemcnt // Need only N to qualify
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movi0 pr.rot = 1 << 16 // set rotating predicates
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} { .mib
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(p_scr) br.cond.dpnt.many .copy_full_words
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;; }
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{ .mmi
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(p_xtr) load tempreg = [src], 8
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(p_xtr) add elemcnt = -1, elemcnt
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movi0 ar.ec = MEMLAT + 1 // set the epilog counter
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;; }
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{ .mmi
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(p_xtr) add len = -8, len //
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add asrc = 16, src // one bank apart (for USE_INT)
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shr.u loopcnt = elemcnt, ALIGN_UNROLL_sh // cater for unrolling
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;;}
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{ .mmi
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add loopcnt = -1, loopcnt
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(p_xtr) store [dest] = tempreg, 8 // copy the "extra" word
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nop.i 0
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;; }
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{ .mib
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add adest = 16, dest
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movi0 ar.lc = loopcnt // set the loop counter
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;; }
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#ifdef GAS_ALIGN_BREAKS_UNWIND_INFO
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{ nop 0 }
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#else
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.align 32
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#endif
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#if defined(USE_FLP)
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.l1: // ------------------------------- // L1: Everything a multiple of 8
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{ .mmi
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#if defined(USE_LFETCH)
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(p[0]) lfetch.nt1 [ptr2],32
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#endif
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(p[0]) ldfp8 the_r[0],the_q[0] = [src], 16
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(p[0]) add len = -32, len
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} {.mmb
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(p[MEMLAT]) store [dest] = the_r[MEMLAT], 8
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(p[MEMLAT]) store [adest] = the_s[MEMLAT], 8
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;; }
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{ .mmi
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#if defined(USE_LFETCH)
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(p[0]) lfetch.nt1 [ptr1],32
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#endif
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(p[0]) ldfp8 the_s[0], the_t[0] = [src], 16
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} {.mmb
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(p[MEMLAT]) store [dest] = the_q[MEMLAT], 24
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(p[MEMLAT]) store [adest] = the_t[MEMLAT], 24
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br.ctop.dptk.many .l1
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;; }
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#elif defined(USE_INT)
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.l1: // ------------------------------- // L1: Everything a multiple of 8
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{ .mmi
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(p[0]) load the_r[0] = [src], 8
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(p[0]) load the_q[0] = [asrc], 8
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(p[0]) add len = -32, len
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} {.mmb
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(p[MEMLAT]) store [dest] = the_r[MEMLAT], 8
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(p[MEMLAT]) store [adest] = the_q[MEMLAT], 8
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;; }
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{ .mmi
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(p[0]) load the_s[0] = [src], 24
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(p[0]) load the_t[0] = [asrc], 24
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} {.mmb
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(p[MEMLAT]) store [dest] = the_s[MEMLAT], 24
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(p[MEMLAT]) store [adest] = the_t[MEMLAT], 24
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#if defined(USE_LFETCH)
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;; }
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{ .mmb
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(p[0]) lfetch.nt1 [ptr2],32
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(p[0]) lfetch.nt1 [ptr1],32
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#endif
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br.ctop.dptk.many .l1
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;; }
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#endif
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.copy_full_words:
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{ .mib
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cmp.gt p_scr, p0 = 8, len //
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shr.u elemcnt = len, 3 //
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(p_scr) br.cond.dpnt.many .copy_bytes
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;; }
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{ .mii
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load tempreg = [src], 8
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add loopcnt = -1, elemcnt //
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;; }
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{ .mii
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cmp.ne p_scr, p0 = 0, loopcnt //
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mov ar.lc = loopcnt //
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;; }
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.l2: // ------------------------------- // L2: Max 4 words copied separately
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{ .mmi
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store [dest] = tempreg, 8
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(p_scr) load tempreg = [src], 8 //
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add len = -8, len
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} { .mib
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cmp.lt p_scr, p0 = 1, loopcnt // avoid load beyond end-point
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add loopcnt = -1, loopcnt
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br.cloop.dptk.few .l2
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;; }
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.copy_bytes:
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{ .mib
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cmp.eq p_scr, p0 = len, r0 // is len == 0 ?
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add loopcnt = -1, len // len--;
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(p_scr) br.cond.spnt .restore_and_exit
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;; }
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{ .mii
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ld1 tmp2 = [src], 1
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movi0 ar.lc = loopcnt
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cmp.ne p_scr, p0 = 0, loopcnt // avoid load beyond end-point
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;; }
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.l3: // ------------------------------- // L3: Final byte move
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{ .mmi
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st1 [dest] = tmp2, 1
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(p_scr) ld1 tmp2 = [src], 1
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} { .mib
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cmp.lt p_scr, p0 = 1, loopcnt // avoid load beyond end-point
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add loopcnt = -1, loopcnt
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br.cloop.dptk.few .l3
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;; }
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.restore_and_exit:
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{ .mmi
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movi0 pr = saved_pr, -1 // restore the predicate registers
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;; }
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{ .mib
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movi0 ar.lc = saved_lc // restore the loop counter
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br.ret.sptk.many b0
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;; }
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.src_not_aligned:
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{ .mmi
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cmp.gt p_scr, p0 = 16, len
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and sh1 = 7, src // sh1 = src % 8
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shr.u loopcnt = len, 4 // element-cnt = len / 16
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} { .mib
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add tmp4 = @ltoff(.table), gp
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add tmp3 = @ltoff(.loop56), gp
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(p_scr) br.cond.dpnt.many .copy_bytes // do byte by byte if too few
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;; }
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{ .mmi
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and asrc = -8, src // asrc = (-8) -- align src for loop
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add loopcnt = -1, loopcnt // loopcnt--
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shl sh1 = sh1, 3 // sh1 = 8 * (src % 8)
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} { .mmi
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ld8 ptable = [tmp4] // ptable = &table
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ld8 ploop56 = [tmp3] // ploop56 = &loop56
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and tmp2 = -16, len // tmp2 = len & -OPSIZ
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;; }
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{ .mmi
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add tmp3 = ptable, sh1 // tmp3 = &table + sh1
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add src = src, tmp2 // src += len & (-16)
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movi0 ar.lc = loopcnt // set LC
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;; }
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{ .mmi
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ld8 tmp4 = [tmp3] // tmp4 = loop offset
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sub len = len, tmp2 // len -= len & (-16)
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movi0 ar.ec = MEMLAT + 2 // one more pass needed
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;; }
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{ .mmi
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ld8 s[1] = [asrc], 8 // preload
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sub loopaddr = ploop56,tmp4 // loopadd = &loop56 - loop offset
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movi0 pr.rot = 1 << 16 // set rotating predicates
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;; }
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{ .mib
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nop.m 0
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movi0 b6 = loopaddr
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br b6 // jump to the appropriate loop
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;; }
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LOOP(8)
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LOOP(16)
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LOOP(24)
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|
LOOP(32)
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LOOP(40)
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LOOP(48)
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LOOP(56)
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|
END(memcpy)
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libc_hidden_builtin_def (memcpy)
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|
|
.rodata
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|
.align 8
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.table:
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data8 0 // dummy entry
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data8 .loop56 - .loop8
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data8 .loop56 - .loop16
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data8 .loop56 - .loop24
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data8 .loop56 - .loop32
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data8 .loop56 - .loop40
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data8 .loop56 - .loop48
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data8 .loop56 - .loop56
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