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1d21fb1061
It turned out that an 256b-mvc instruction which depends on the result of a previous 256b-mvc instruction is counterproductive. Therefore this patch adjusts the 256b-loop by storing the first byte with stc and setting the remaining 255b with mvc. Now the 255b-mvc instruction depends on the stc instruction.
219 lines
5.1 KiB
ArmAsm
219 lines
5.1 KiB
ArmAsm
/* Set a block of memory to some byte value. 31/64 bit S/390 version.
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Copyright (C) 2001-2020 Free Software Foundation, Inc.
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Contributed by Martin Schwidefsky (schwidefsky@de.ibm.com).
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#include "asm-syntax.h"
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#include <ifunc-memset.h>
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/* INPUT PARAMETERS - MEMSET
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%r2 = address of memory area
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%r3 = byte to fill memory with
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%r4 = number of bytes to fill.
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INPUT PARAMETERS - BZERO
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%r2 = address of memory area
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%r3 = number of bytes to fill. */
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.text
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#if HAVE_MEMSET_Z900_G5
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# if defined __s390x__
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# define LTGR ltgr
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# define CGHI cghi
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# define LGR lgr
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# define AGHI aghi
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# define BRCTG brctg
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# else
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# define LTGR ltr
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# define CGHI chi
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# define LGR lr
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# define AGHI ahi
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# define BRCTG brct
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# endif /* ! defined __s390x__ */
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ENTRY(BZERO_Z900_G5)
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LGR %r4,%r3
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xr %r3,%r3
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j .L_Z900_G5_start
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END(BZERO_Z900_G5)
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ENTRY(MEMSET_Z900_G5)
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.L_Z900_G5_start:
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#if defined __s390x__
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.machine "z900"
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#else
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.machine "g5"
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#endif /* ! defined __s390x__ */
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LTGR %r4,%r4
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je .L_Z900_G5_4
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stc %r3,0(%r2)
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CGHI %r4,1
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LGR %r1,%r2
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je .L_Z900_G5_4
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AGHI %r4,-2
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#if defined __s390x__
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larl %r5,.L_Z900_G5_18
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srlg %r3,%r4,8
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# define Z900_G5_EX_D 0
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#else
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basr %r5,0
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.L_Z900_G5_19:
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# define Z900_G5_EX_D .L_Z900_G5_18-.L_Z900_G5_19
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lr %r3,%r4
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srl %r3,8
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#endif /* ! defined __s390x__ */
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LTGR %r3,%r3
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jne .L_Z900_G5_14
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.L_Z900_G5_3:
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ex %r4,Z900_G5_EX_D(%r5)
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.L_Z900_G5_4:
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br %r14
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.L_Z900_G5_14:
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mvc 1(256,%r1),0(%r1)
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la %r1,256(%r1)
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BRCTG %r3,.L_Z900_G5_14
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j .L_Z900_G5_3
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.L_Z900_G5_18:
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mvc 1(1,%r1),0(%r1)
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END(MEMSET_Z900_G5)
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# undef LTGR
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# undef CGHI
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# undef LGR
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# undef AGHI
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# undef BRCTG
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#endif /* HAVE_MEMSET_Z900_G5 */
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#if HAVE_MEMSET_Z10
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ENTRY(BZERO_Z10)
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.machine "z10"
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.machinemode "zarch_nohighgprs"
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lgr %r4,%r3
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xr %r3,%r3
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j .L_Z10_start
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END(BZERO_Z10)
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ENTRY(MEMSET_Z10)
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.L_Z10_start:
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.machine "z10"
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.machinemode "zarch_nohighgprs"
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# if !defined __s390x__
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llgfr %r4,%r4
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# endif /* !defined __s390x__ */
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cgije %r4,0,.L_Z10_4
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stc %r3,0(%r2)
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lgr %r1,%r2
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cgije %r4,1,.L_Z10_4
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aghi %r4,-2
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srlg %r5,%r4,8
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cgijlh %r5,0,.L_Z10_15
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.L_Z10_3:
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exrl %r4,.L_Z10_18
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.L_Z10_4:
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br %r14
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.L_Z10_15:
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cgfi %r5,163840 # Switch to mvcle for >40MB
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jh __memset_mvcle
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.L_Z10_14:
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pfd 2,1024(%r1)
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mvc 1(256,%r1),0(%r1)
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la %r1,256(%r1)
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brctg %r5,.L_Z10_14
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j .L_Z10_3
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.L_Z10_18:
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mvc 1(1,%r1),0(%r1)
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END(MEMSET_Z10)
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#endif /* HAVE_MEMSET_Z10 */
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#if HAVE_MEMSET_Z196
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ENTRY(BZERO_Z196)
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.machine "z196"
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.machinemode "zarch_nohighgprs"
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lgr %r4,%r3
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xr %r3,%r3
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j .L_Z196_start
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END(BZERO_Z196)
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ENTRY(MEMSET_Z196)
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.L_Z196_start:
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.machine "z196"
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.machinemode "zarch_nohighgprs"
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# if !defined __s390x__
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llgfr %r4,%r4
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# endif /* !defined __s390x__ */
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clgfi %r4,1
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jl .L_Z196_4 # n == 0
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stc %r3,0(%r2)
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je .L_Z196_4 # n == 1
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aghi %r4,-2
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lgr %r1,%r2
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risbg %r5,%r4,8,128+63,56 # r5 = n / 256
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jne .L_Z196_1 # Jump away if r5 != 0
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.L_Z196_3:
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exrl %r4,.L_Z196_17
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.L_Z196_4:
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br %r14
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.L_Z196_1:
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cgfi %r5,1048576
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jh __memset_mvcle # Switch to mvcle for >256MB
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.L_Z196_2:
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pfd 2,1024(%r1)
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mvc 1(255,%r1),0(%r1)
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aghi %r5,-1
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la %r1,256(%r1)
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stc %r3,0(%r1)
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jne .L_Z196_2
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j .L_Z196_3
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.L_Z196_17:
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mvc 1(1,%r1),0(%r1)
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END(MEMSET_Z196)
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#endif /* HAVE_MEMSET_Z196 */
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#if HAVE_MEMSET_MVCLE
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ENTRY(__memset_mvcle)
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aghi %r4,2 # take back the change done by the caller
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lgr %r0,%r2 # save source address
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lgr %r1,%r3 # move pad byte to R1
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lgr %r3,%r4 # move length to r3
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sgr %r4,%r4 # no source for MVCLE, only a pad byte
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sgr %r5,%r5
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.L0: mvcle %r2,%r4,0(%r1) # thats it, MVCLE is your friend
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jo .L0
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lgr %r2,%r0 # return value is source address
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.L1:
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br %r14
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END(__memset_mvcle)
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#endif /* HAVE_MEMSET_MVCLE */
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#if ! HAVE_MEMSET_IFUNC
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/* If we don't use ifunc, define an alias for memset here.
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Otherwise see sysdeps/s390/memset.c. */
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strong_alias (MEMSET_DEFAULT, memset)
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/* Same for bzero. If ifunc is used, see
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sysdeps/s390/bzero.c. */
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strong_alias (BZERO_DEFAULT, __bzero)
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weak_alias (__bzero, bzero)
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#endif
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#if defined SHARED && IS_IN (libc)
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/* Defines the internal symbol.
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Compare to libc_hidden_builtin_def (memset) in string/memset.c. */
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strong_alias (MEMSET_DEFAULT, __GI_memset)
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#endif
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