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685896ef5a
* sysdeps/alpha/dl-dtprocnum.h: New file.
* sysdeps/alpha/dl-machine.h (DT_ALPHA): New.
(elf_machine_load_address): Simplify to rely on gprel relocations.
(elf_machine_runtime_setup): Handle DT_ALPHA_PLTRO plt format.
Remove thread safety workaround for binutils 2.6.
(elf_machine_fixup_plt): Handle DT_ALPHA_PLTRO plt format.
* sysdeps/alpha/dl-trampoline.S (_dl_runtime_resolve_new): New.
(_dl_runtime_profile_new): New.
(_dl_runtime_resolve_old): Rename from _dl_runtime_resolve.
(_dl_runtime_profile_old): Rename from _dl_runtime_profile. Fix
typo in _dl_call_pltexit argument loading.
* sysdeps/alpha/div_libc.h (funcnoplt): New.
* sysdeps/alpha/divl.S, sysdeps/alpha/divq.S: Use it.
* sysdeps/alpha/divqu.S, sysdeps/alpha/reml.S: Likewise.
* sysdeps/alpha/remq.S, sysdeps/alpha/remqu.S: Likewise.
165 lines
3.9 KiB
C
165 lines
3.9 KiB
C
/* Copyright (C) 2004 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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/* Common bits for implementing software divide. */
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#include <sysdep.h>
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#ifdef __linux__
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# include <asm/gentrap.h>
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# include <asm/pal.h>
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#else
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# include <machine/pal.h>
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#endif
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/* These are not normal C functions. Argument registers are t10 and t11;
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the result goes in t12; the return address is in t9. Only t12 and AT
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may be clobbered. */
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#define X t10
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#define Y t11
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#define RV t12
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#define RA t9
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/* The secureplt format does not allow the division routines to be called
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via plt; there aren't enough registers free to be clobbered. Avoid
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setting the symbol type to STT_FUNC, so that the linker won't be tempted
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to create a plt entry. */
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#define funcnoplt notype
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/* None of these functions should use implicit anything. */
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.set nomacro
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.set noat
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/* Code fragment to invoke _mcount for profiling. This should be invoked
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directly after allocation of the stack frame. */
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.macro CALL_MCOUNT
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#ifdef PROF
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stq ra, 0(sp)
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stq pv, 8(sp)
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stq gp, 16(sp)
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cfi_rel_offset (ra, 0)
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cfi_rel_offset (pv, 8)
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cfi_rel_offset (gp, 16)
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br AT, 1f
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.set macro
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1: ldgp gp, 0(AT)
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mov RA, ra
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lda AT, _mcount
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jsr AT, (AT), _mcount
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.set nomacro
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ldq ra, 0(sp)
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ldq pv, 8(sp)
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ldq gp, 16(sp)
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cfi_restore (ra)
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cfi_restore (pv)
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cfi_restore (gp)
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/* Realign subsequent code with what we'd have without this
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macro at all. This means aligned with one arithmetic insn
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used within the bundle. */
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.align 4
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nop
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#endif
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.endm
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/* In order to make the below work, all top-level divide routines must
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use the same frame size. */
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#define FRAME 64
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/* Code fragment to generate an integer divide-by-zero fault. When
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building libc.so, we arrange for there to be one copy of this code
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placed late in the dso, such that all branches are forward. When
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building libc.a, we use multiple copies to avoid having an out of
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range branch. Users should jump to DIVBYZERO. */
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.macro DO_DIVBYZERO
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#ifdef PIC
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#define DIVBYZERO __divbyzero
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.section .gnu.linkonce.t.divbyzero, "ax", @progbits
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.globl __divbyzero
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.type __divbyzero, @function
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.usepv __divbyzero, no
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.hidden __divbyzero
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#else
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#define DIVBYZERO $divbyzero
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#endif
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.align 4
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DIVBYZERO:
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cfi_startproc
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cfi_return_column (RA)
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cfi_def_cfa_offset (FRAME)
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mov a0, RV
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unop
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lda a0, GEN_INTDIV
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call_pal PAL_gentrap
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mov RV, a0
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clr RV
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lda sp, FRAME(sp)
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cfi_def_cfa_offset (0)
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ret $31, (RA), 1
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cfi_endproc
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.size DIVBYZERO, .-DIVBYZERO
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.endm
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/* Like the ev6 instructions, but fall back to stack use on prior machines. */
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.arch ev6
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.macro _ITOFS gr, fr, slot
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#ifdef __alpha_fix__
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itofs \gr, \fr
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#else
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stl \gr, \slot(sp)
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lds \fr, \slot(sp)
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#endif
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.endm
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.macro _ITOFT gr, fr, slot
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#ifdef __alpha_fix__
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itoft \gr, \fr
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#else
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stq \gr, \slot(sp)
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ldt \fr, \slot(sp)
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#endif
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.endm
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.macro _FTOIT fr, gr, slot
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#ifdef __alpha_fix__
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ftoit \fr, \gr
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#else
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stt \fr, \slot(sp)
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ldq \gr, \slot(sp)
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#endif
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.endm
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/* Similarly, but move two registers. Schedules better for pre-ev6. */
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.macro _ITOFT2 gr1, fr1, slot1, gr2, fr2, slot2
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#ifdef __alpha_fix__
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itoft \gr1, \fr1
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itoft \gr2, \fr2
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#else
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stq \gr1, \slot1(sp)
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stq \gr2, \slot2(sp)
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ldt \fr1, \slot1(sp)
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ldt \fr2, \slot2(sp)
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#endif
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.endm
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