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I used these shell commands: ../glibc/scripts/update-copyrights $PWD/../gnulib/build-aux/update-copyright (cd ../glibc && git commit -am"[this commit message]") and then ignored the output, which consisted lines saying "FOO: warning: copyright statement not found" for each of 6694 files FOO. I then removed trailing white space from benchtests/bench-pthread-locks.c and iconvdata/tst-iconv-big5-hkscs-to-2ucs4.c, to work around this diagnostic from Savannah: remote: *** pre-commit check failed ... remote: *** error: lines with trailing whitespace found remote: error: hook declined to update refs/heads/master
532 lines
13 KiB
ArmAsm
532 lines
13 KiB
ArmAsm
/* Optimized memcpy implementation for PowerPC A2.
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Copyright (C) 2010-2021 Free Software Foundation, Inc.
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Contributed by Michael Brutman <brutman@us.ibm.com>.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#include <rtld-global-offsets.h>
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#ifndef MEMCPY
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# define MEMCPY memcpy
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#endif
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#define PREFETCH_AHEAD 4 /* no cache lines SRC prefetching ahead */
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#define ZERO_AHEAD 2 /* no cache lines DST zeroing ahead */
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.section ".toc","aw"
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__GLRO_DEF(dl_cache_line_size)
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.section ".text"
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.align 2
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.machine a2
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ENTRY (MEMCPY, 5)
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CALL_MCOUNT 3
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dcbt 0,r4 /* Prefetch ONE SRC cacheline */
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cmpldi cr1,r5,16 /* is size < 16 ? */
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mr r6,r3 /* Copy dest reg to r6; */
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blt+ cr1,L(shortcopy)
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/* Big copy (16 bytes or more)
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Figure out how far to the nearest quadword boundary, or if we are
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on one already. Also get the cache line size.
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r3 - return value (always)
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r4 - current source addr
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r5 - copy length
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r6 - current dest addr
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*/
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neg r8,r3 /* LS 4 bits = # bytes to 8-byte dest bdry */
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/* Get the cache line size. */
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__GLRO (r9, dl_cache_line_size,
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RTLD_GLOBAL_RO_DL_CACHE_LINE_SIZE_OFFSET)
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clrldi r8,r8,64-4 /* align to 16byte boundary */
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sub r7,r4,r3 /* compute offset to src from dest */
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cmpldi cr0,r8,0 /* Were we aligned on a 16 byte bdy? */
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addi r10,r9,-1 /* Cache line mask */
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beq+ L(dst_aligned)
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/* Destination is not aligned on quadword boundary. Get us to one.
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r3 - return value (always)
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r4 - current source addr
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r5 - copy length
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r6 - current dest addr
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r7 - offset to src from dest
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r8 - number of bytes to quadword boundary
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*/
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mtcrf 0x01,r8 /* put #bytes to boundary into cr7 */
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subf r5,r8,r5 /* adjust remaining len */
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bf cr7*4+3,1f
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lbzx r0,r7,r6 /* copy 1 byte addr */
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stb r0,0(r6)
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addi r6,r6,1
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1:
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bf cr7*4+2,2f
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lhzx r0,r7,r6 /* copy 2 byte addr */
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sth r0,0(r6)
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addi r6,r6,2
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2:
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bf cr7*4+1,4f
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lwzx r0,r7,r6 /* copy 4 byte addr */
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stw r0,0(r6)
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addi r6,r6,4
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4:
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bf cr7*4+0,8f
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ldx r0,r7,r6 /* copy 8 byte addr */
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std r0,0(r6)
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addi r6,r6,8
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8:
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add r4,r7,r6 /* update src addr */
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/* Dest is quadword aligned now.
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Lots of decisions to make. If we are copying less than a cache
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line we won't be here long. If we are not on a cache line
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boundary we need to get there. And then we need to figure out
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how many cache lines ahead to pre-touch.
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r3 - return value (always)
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r4 - current source addr
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r5 - copy length
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r6 - current dest addr
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*/
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.align 4
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L(dst_aligned):
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cmpdi cr0,r9,0 /* Cache line size set? */
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bne+ cr0,L(cachelineset)
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/* Cache line size not set: generic byte copy without much optimization */
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clrldi. r0,r5,63 /* If length is odd copy one byte */
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beq L(cachelinenotset_align)
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lbz r7,0(r4) /* Read one byte from source */
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addi r5,r5,-1 /* Update length */
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addi r4,r4,1 /* Update source pointer address */
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stb r7,0(r6) /* Store one byte at dest */
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addi r6,r6,1 /* Update dest pointer address */
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L(cachelinenotset_align):
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cmpdi cr7,r5,0 /* If length is 0 return */
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beqlr cr7
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ori r2,r2,0 /* Force a new dispatch group */
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L(cachelinenotset_loop):
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addic. r5,r5,-2 /* Update length */
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lbz r7,0(r4) /* Load 2 bytes from source */
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lbz r8,1(r4)
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addi r4,r4,2 /* Update source pointer address */
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stb r7,0(r6) /* Store 2 bytes on dest */
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stb r8,1(r6)
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addi r6,r6,2 /* Update dest pointer address */
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bne L(cachelinenotset_loop)
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blr
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L(cachelineset):
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cmpd cr5,r5,r10 /* Less than a cacheline to go? */
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neg r7,r6 /* How far to next cacheline bdy? */
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addi r6,r6,-8 /* prepare for stdu */
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cmpdi cr0,r9,128
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addi r4,r4,-8 /* prepare for ldu */
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ble+ cr5,L(lessthancacheline)
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beq- cr0,L(big_lines) /* 128 byte line code */
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/* More than a cacheline left to go, and using 64 byte cachelines */
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clrldi r7,r7,64-6 /* How far to next cacheline bdy? */
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cmpldi cr6,r7,0 /* Are we on a cacheline bdy already? */
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/* Reduce total len by what it takes to get to the next cache line */
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subf r5,r7,r5
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srdi r7,r7,4 /* How many qws to get to the line bdy? */
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/* How many full cache lines to copy after getting to a line bdy? */
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srdi r10,r5,6
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cmpldi r10,0 /* If no full cache lines to copy ... */
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li r11,0 /* number cachelines to copy with prefetch */
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beq L(nocacheprefetch)
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/* We are here because we have at least one full cache line to copy,
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and therefore some pre-touching to do. */
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cmpldi r10,PREFETCH_AHEAD
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li r12,64+8 /* prefetch distance */
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ble L(lessthanmaxprefetch)
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/* We can only do so much pre-fetching. R11 will have the count of
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lines left to prefetch after the initial batch of prefetches
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are executed. */
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subi r11,r10,PREFETCH_AHEAD
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li r10,PREFETCH_AHEAD
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L(lessthanmaxprefetch):
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mtctr r10
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/* At this point r10/ctr hold the number of lines to prefetch in this
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initial batch, and r11 holds any remainder. */
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L(prefetchSRC):
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dcbt r12,r4
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addi r12,r12,64
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bdnz L(prefetchSRC)
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/* Prefetching is done, or was not needed.
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cr6 - are we on a cacheline boundary already?
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r7 - number of quadwords to the next cacheline boundary
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*/
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L(nocacheprefetch):
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mtctr r7
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cmpldi cr1,r5,64 /* Less than a cache line to copy? */
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/* How many bytes are left after we copy whatever full
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cache lines we can get? */
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clrldi r5,r5,64-6
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beq cr6,L(cachelinealigned)
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/* Copy quadwords up to the next cacheline boundary */
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L(aligntocacheline):
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ld r9,0x08(r4)
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ld r7,0x10(r4)
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addi r4,r4,0x10
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std r9,0x08(r6)
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stdu r7,0x10(r6)
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bdnz L(aligntocacheline)
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.align 4
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L(cachelinealigned): /* copy while cache lines */
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blt- cr1,L(lessthancacheline) /* size <64 */
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L(outerloop):
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cmpdi r11,0
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mtctr r11
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beq- L(endloop)
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li r11,64*ZERO_AHEAD +8 /* DCBZ dist */
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.align 4
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/* Copy whole cachelines, optimized by prefetching SRC cacheline */
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L(loop): /* Copy aligned body */
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dcbt r12,r4 /* PREFETCH SOURCE some cache lines ahead */
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ld r9, 0x08(r4)
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dcbz r11,r6
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ld r7, 0x10(r4)
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ld r8, 0x18(r4)
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ld r0, 0x20(r4)
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std r9, 0x08(r6)
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std r7, 0x10(r6)
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std r8, 0x18(r6)
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std r0, 0x20(r6)
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ld r9, 0x28(r4)
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ld r7, 0x30(r4)
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ld r8, 0x38(r4)
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ld r0, 0x40(r4)
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addi r4, r4,0x40
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std r9, 0x28(r6)
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std r7, 0x30(r6)
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std r8, 0x38(r6)
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stdu r0, 0x40(r6)
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bdnz L(loop)
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L(endloop):
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cmpdi r10,0
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beq- L(endloop2)
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mtctr r10
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L(loop2): /* Copy aligned body */
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ld r9, 0x08(r4)
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ld r7, 0x10(r4)
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ld r8, 0x18(r4)
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ld r0, 0x20(r4)
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std r9, 0x08(r6)
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std r7, 0x10(r6)
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std r8, 0x18(r6)
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std r0, 0x20(r6)
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ld r9, 0x28(r4)
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ld r7, 0x30(r4)
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ld r8, 0x38(r4)
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ld r0, 0x40(r4)
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addi r4, r4,0x40
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std r9, 0x28(r6)
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std r7, 0x30(r6)
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std r8, 0x38(r6)
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stdu r0, 0x40(r6)
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bdnz L(loop2)
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L(endloop2):
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.align 4
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L(lessthancacheline): /* Was there less than cache to do ? */
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cmpldi cr0,r5,16
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srdi r7,r5,4 /* divide size by 16 */
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blt- L(do_lt16)
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mtctr r7
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L(copy_remaining):
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ld r8,0x08(r4)
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ld r7,0x10(r4)
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addi r4,r4,0x10
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std r8,0x08(r6)
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stdu r7,0x10(r6)
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bdnz L(copy_remaining)
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L(do_lt16): /* less than 16 ? */
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cmpldi cr0,r5,0 /* copy remaining bytes (0-15) */
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beqlr+ /* no rest to copy */
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addi r4,r4,8
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addi r6,r6,8
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L(shortcopy): /* SIMPLE COPY to handle size =< 15 bytes */
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mtcrf 0x01,r5
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sub r7,r4,r6
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bf- cr7*4+0,8f
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ldx r0,r7,r6 /* copy 8 byte */
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std r0,0(r6)
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addi r6,r6,8
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8:
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bf cr7*4+1,4f
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lwzx r0,r7,r6 /* copy 4 byte */
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stw r0,0(r6)
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addi r6,r6,4
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4:
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bf cr7*4+2,2f
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lhzx r0,r7,r6 /* copy 2 byte */
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sth r0,0(r6)
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addi r6,r6,2
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2:
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bf cr7*4+3,1f
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lbzx r0,r7,r6 /* copy 1 byte */
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stb r0,0(r6)
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1:
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blr
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/* Similar to above, but for use with 128 byte lines. */
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L(big_lines):
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clrldi r7,r7,64-7 /* How far to next cacheline bdy? */
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cmpldi cr6,r7,0 /* Are we on a cacheline bdy already? */
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/* Reduce total len by what it takes to get to the next cache line */
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subf r5,r7,r5
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srdi r7,r7,4 /* How many qws to get to the line bdy? */
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/* How many full cache lines to copy after getting to a line bdy? */
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srdi r10,r5,7
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cmpldi r10,0 /* If no full cache lines to copy ... */
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li r11,0 /* number cachelines to copy with prefetch */
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beq L(nocacheprefetch_128)
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/* We are here because we have at least one full cache line to copy,
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and therefore some pre-touching to do. */
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cmpldi r10,PREFETCH_AHEAD
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li r12,128+8 /* prefetch distance */
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ble L(lessthanmaxprefetch_128)
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/* We can only do so much pre-fetching. R11 will have the count of
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lines left to prefetch after the initial batch of prefetches
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are executed. */
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subi r11,r10,PREFETCH_AHEAD
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li r10,PREFETCH_AHEAD
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L(lessthanmaxprefetch_128):
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mtctr r10
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/* At this point r10/ctr hold the number of lines to prefetch in this
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initial batch, and r11 holds any remainder. */
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L(prefetchSRC_128):
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dcbt r12,r4
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addi r12,r12,128
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bdnz L(prefetchSRC_128)
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/* Prefetching is done, or was not needed.
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cr6 - are we on a cacheline boundary already?
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r7 - number of quadwords to the next cacheline boundary
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*/
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L(nocacheprefetch_128):
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mtctr r7
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cmpldi cr1,r5,128 /* Less than a cache line to copy? */
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/* How many bytes are left after we copy whatever full
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cache lines we can get? */
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clrldi r5,r5,64-7
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beq cr6,L(cachelinealigned_128)
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/* Copy quadwords up to the next cacheline boundary */
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L(aligntocacheline_128):
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ld r9,0x08(r4)
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ld r7,0x10(r4)
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addi r4,r4,0x10
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std r9,0x08(r6)
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stdu r7,0x10(r6)
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bdnz L(aligntocacheline_128)
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L(cachelinealigned_128): /* copy while cache lines */
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blt- cr1,L(lessthancacheline) /* size <128 */
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L(outerloop_128):
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cmpdi r11,0
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mtctr r11
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beq- L(endloop_128)
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li r11,128*ZERO_AHEAD +8 /* DCBZ dist */
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.align 4
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/* Copy whole cachelines, optimized by prefetching SRC cacheline */
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L(loop_128): /* Copy aligned body */
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dcbt r12,r4 /* PREFETCH SOURCE some cache lines ahead */
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ld r9, 0x08(r4)
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dcbz r11,r6
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ld r7, 0x10(r4)
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ld r8, 0x18(r4)
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ld r0, 0x20(r4)
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std r9, 0x08(r6)
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std r7, 0x10(r6)
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std r8, 0x18(r6)
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std r0, 0x20(r6)
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ld r9, 0x28(r4)
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ld r7, 0x30(r4)
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ld r8, 0x38(r4)
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ld r0, 0x40(r4)
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std r9, 0x28(r6)
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std r7, 0x30(r6)
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std r8, 0x38(r6)
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std r0, 0x40(r6)
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ld r9, 0x48(r4)
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ld r7, 0x50(r4)
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ld r8, 0x58(r4)
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ld r0, 0x60(r4)
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std r9, 0x48(r6)
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std r7, 0x50(r6)
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std r8, 0x58(r6)
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std r0, 0x60(r6)
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ld r9, 0x68(r4)
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ld r7, 0x70(r4)
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ld r8, 0x78(r4)
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ld r0, 0x80(r4)
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addi r4, r4,0x80
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std r9, 0x68(r6)
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std r7, 0x70(r6)
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std r8, 0x78(r6)
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stdu r0, 0x80(r6)
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bdnz L(loop_128)
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L(endloop_128):
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cmpdi r10,0
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beq- L(endloop2_128)
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mtctr r10
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L(loop2_128): /* Copy aligned body */
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ld r9, 0x08(r4)
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ld r7, 0x10(r4)
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ld r8, 0x18(r4)
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ld r0, 0x20(r4)
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std r9, 0x08(r6)
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std r7, 0x10(r6)
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std r8, 0x18(r6)
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std r0, 0x20(r6)
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ld r9, 0x28(r4)
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|
ld r7, 0x30(r4)
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|
ld r8, 0x38(r4)
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|
ld r0, 0x40(r4)
|
|
std r9, 0x28(r6)
|
|
std r7, 0x30(r6)
|
|
std r8, 0x38(r6)
|
|
std r0, 0x40(r6)
|
|
ld r9, 0x48(r4)
|
|
ld r7, 0x50(r4)
|
|
ld r8, 0x58(r4)
|
|
ld r0, 0x60(r4)
|
|
std r9, 0x48(r6)
|
|
std r7, 0x50(r6)
|
|
std r8, 0x58(r6)
|
|
std r0, 0x60(r6)
|
|
ld r9, 0x68(r4)
|
|
ld r7, 0x70(r4)
|
|
ld r8, 0x78(r4)
|
|
ld r0, 0x80(r4)
|
|
addi r4, r4,0x80
|
|
std r9, 0x68(r6)
|
|
std r7, 0x70(r6)
|
|
std r8, 0x78(r6)
|
|
stdu r0, 0x80(r6)
|
|
|
|
bdnz L(loop2_128)
|
|
L(endloop2_128):
|
|
|
|
b L(lessthancacheline)
|
|
|
|
|
|
END_GEN_TB (MEMCPY,TB_TOCLESS)
|
|
libc_hidden_builtin_def (memcpy)
|