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72aa623345
Based on new expf and exp2f code from https://github.com/ARM-software/optimized-routines/ with wrapper on aarch64: expf reciprocal-throughput: 2.3x faster expf latency: 1.7x faster without wrapper on aarch64: expf reciprocal-throughput: 3.3x faster expf latency: 1.7x faster without wrapper on aarch64: exp2f reciprocal-throughput: 2.8x faster exp2f latency: 1.3x faster libm.so size on aarch64: .text size: -152 bytes .rodata size: -1740 bytes expf/exp2f worst case nearest rounding error: 0.502 ulp worst case non-nearest rounding error: 1 ulp Error checks are inline and errno setting is in separate tail called functions, but the wrappers are kept in this patch to handle the _LIB_VERSION==_SVID_ case. (So e.g. errno is set twice for expf calls and once for __expf_finite calls on targets where the new code is used.) Double precision arithmetics is used which is expected to be faster on most targets (including soft-float) than using single precision and it is easier to get good precision result with it. Const data is kept in a separate translation unit which complicates maintenance a bit, but is expected to give good code for literal loads on most targets and allows sharing data across expf, exp2f and powf. (This data is disabled on i386, m68k and ia64 which have their own expf, exp2f and powf code.) Some details may need target specific tweaks: - best convert and round to int operation in the arg reduction may be different across targets. - code was optimized on fma target, optimal polynomial eval may be different without fma. - gcc does not always generate good code for fp bit representation access via unions or it may be inherently slow on some targets. The libm-test-ulps will need adjustment because.. - The argument reduction ideally uses nearest rounded rint, but that is not efficient on most targets, so the polynomial can get evaluated on a wider interval in non-nearest rounding mode making 1 ulp errors common in that case. - The polynomial is evaluated such that it may have 1 ulp error on negative tiny inputs with upward rounding. * math/Makefile (type-float-routines): Add math_errf and e_exp2f_data. * sysdeps/aarch64/fpu/math_private.h (TOINT_INTRINSICS): Define. (roundtoint, converttoint): Likewise. * sysdeps/ieee754/flt-32/e_expf.c: New implementation. * sysdeps/ieee754/flt-32/e_exp2f.c: New implementation. * sysdeps/ieee754/flt-32/e_exp2f_data.c: New file. * sysdeps/ieee754/flt-32/math_config.h: New file. * sysdeps/ieee754/flt-32/math_errf.c: New file. * sysdeps/ieee754/flt-32/t_exp2f.h: Remove. * sysdeps/i386/fpu/e_exp2f_data.c: New file. * sysdeps/i386/fpu/math_errf.c: New file. * sysdeps/ia64/fpu/e_exp2f_data.c: New file. * sysdeps/ia64/fpu/math_errf.c: New file. * sysdeps/m68k/m680x0/fpu/e_exp2f_data.c: New file. * sysdeps/m68k/m680x0/fpu/math_errf.c: New file.
345 lines
9.2 KiB
C
345 lines
9.2 KiB
C
/* Private floating point rounding and exceptions handling. AArch64 version.
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Copyright (C) 2014-2017 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#ifndef AARCH64_MATH_PRIVATE_H
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#define AARCH64_MATH_PRIVATE_H 1
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#include <fenv.h>
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#include <fpu_control.h>
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#define math_opt_barrier(x) \
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({ __typeof (x) __x = (x); __asm ("" : "+w" (__x)); __x; })
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#define math_force_eval(x) \
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({ __typeof (x) __x = (x); __asm __volatile__ ("" : : "w" (__x)); })
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extern __always_inline double
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__ieee754_sqrt (double d)
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{
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double res;
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asm __volatile__ ("fsqrt %d0, %d1" : "=w" (res) : "w" (d));
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return res;
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}
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extern __always_inline float
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__ieee754_sqrtf (float s)
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{
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float res;
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asm __volatile__ ("fsqrt %s0, %s1" : "=w" (res) : "w" (s));
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return res;
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}
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static __always_inline void
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libc_feholdexcept_aarch64 (fenv_t *envp)
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{
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fpu_control_t fpcr;
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fpu_control_t new_fpcr;
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fpu_fpsr_t fpsr;
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fpu_fpsr_t new_fpsr;
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_FPU_GETCW (fpcr);
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_FPU_GETFPSR (fpsr);
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envp->__fpcr = fpcr;
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envp->__fpsr = fpsr;
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/* Clear exception flags and set all exceptions to non-stop. */
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new_fpcr = fpcr & ~(FE_ALL_EXCEPT << FE_EXCEPT_SHIFT);
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new_fpsr = fpsr & ~FE_ALL_EXCEPT;
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if (__glibc_unlikely (new_fpcr != fpcr))
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_FPU_SETCW (new_fpcr);
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if (new_fpsr != fpsr)
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_FPU_SETFPSR (new_fpsr);
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}
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#define libc_feholdexcept libc_feholdexcept_aarch64
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#define libc_feholdexceptf libc_feholdexcept_aarch64
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#define libc_feholdexceptl libc_feholdexcept_aarch64
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static __always_inline void
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libc_fesetround_aarch64 (int round)
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{
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fpu_control_t fpcr;
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_FPU_GETCW (fpcr);
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/* Check whether rounding modes are different. */
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round = (fpcr ^ round) & _FPU_FPCR_RM_MASK;
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/* Set new rounding mode if different. */
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if (__glibc_unlikely (round != 0))
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_FPU_SETCW (fpcr ^ round);
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}
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#define libc_fesetround libc_fesetround_aarch64
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#define libc_fesetroundf libc_fesetround_aarch64
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#define libc_fesetroundl libc_fesetround_aarch64
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static __always_inline void
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libc_feholdexcept_setround_aarch64 (fenv_t *envp, int round)
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{
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fpu_control_t fpcr;
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fpu_control_t new_fpcr;
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fpu_fpsr_t fpsr;
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fpu_fpsr_t new_fpsr;
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_FPU_GETCW (fpcr);
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_FPU_GETFPSR (fpsr);
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envp->__fpcr = fpcr;
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envp->__fpsr = fpsr;
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/* Clear exception flags, set all exceptions to non-stop,
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and set new rounding mode. */
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new_fpcr = fpcr & ~((FE_ALL_EXCEPT << FE_EXCEPT_SHIFT) | _FPU_FPCR_RM_MASK);
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new_fpcr |= round;
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new_fpsr = fpsr & ~FE_ALL_EXCEPT;
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if (__glibc_unlikely (new_fpcr != fpcr))
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_FPU_SETCW (new_fpcr);
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if (new_fpsr != fpsr)
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_FPU_SETFPSR (new_fpsr);
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}
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#define libc_feholdexcept_setround libc_feholdexcept_setround_aarch64
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#define libc_feholdexcept_setroundf libc_feholdexcept_setround_aarch64
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#define libc_feholdexcept_setroundl libc_feholdexcept_setround_aarch64
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static __always_inline int
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libc_fetestexcept_aarch64 (int ex)
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{
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fpu_fpsr_t fpsr;
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_FPU_GETFPSR (fpsr);
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return fpsr & ex & FE_ALL_EXCEPT;
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}
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#define libc_fetestexcept libc_fetestexcept_aarch64
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#define libc_fetestexceptf libc_fetestexcept_aarch64
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#define libc_fetestexceptl libc_fetestexcept_aarch64
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static __always_inline void
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libc_fesetenv_aarch64 (const fenv_t *envp)
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{
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fpu_control_t fpcr;
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fpu_control_t new_fpcr;
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_FPU_GETCW (fpcr);
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new_fpcr = envp->__fpcr;
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if (__glibc_unlikely (fpcr != new_fpcr))
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_FPU_SETCW (new_fpcr);
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_FPU_SETFPSR (envp->__fpsr);
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}
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#define libc_fesetenv libc_fesetenv_aarch64
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#define libc_fesetenvf libc_fesetenv_aarch64
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#define libc_fesetenvl libc_fesetenv_aarch64
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#define libc_feresetround_noex libc_fesetenv_aarch64
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#define libc_feresetround_noexf libc_fesetenv_aarch64
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#define libc_feresetround_noexl libc_fesetenv_aarch64
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static __always_inline int
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libc_feupdateenv_test_aarch64 (const fenv_t *envp, int ex)
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{
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fpu_control_t fpcr;
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fpu_control_t new_fpcr;
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fpu_fpsr_t fpsr;
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fpu_fpsr_t new_fpsr;
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int excepts;
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_FPU_GETCW (fpcr);
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_FPU_GETFPSR (fpsr);
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/* Merge current exception flags with the saved fenv. */
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excepts = fpsr & FE_ALL_EXCEPT;
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new_fpcr = envp->__fpcr;
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new_fpsr = envp->__fpsr | excepts;
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if (__glibc_unlikely (fpcr != new_fpcr))
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_FPU_SETCW (new_fpcr);
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if (fpsr != new_fpsr)
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_FPU_SETFPSR (new_fpsr);
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/* Raise the exceptions if enabled in the new FP state. */
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if (__glibc_unlikely (excepts & (new_fpcr >> FE_EXCEPT_SHIFT)))
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__feraiseexcept (excepts);
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return excepts & ex;
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}
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#define libc_feupdateenv_test libc_feupdateenv_test_aarch64
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#define libc_feupdateenv_testf libc_feupdateenv_test_aarch64
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#define libc_feupdateenv_testl libc_feupdateenv_test_aarch64
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static __always_inline void
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libc_feupdateenv_aarch64 (const fenv_t *envp)
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{
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libc_feupdateenv_test_aarch64 (envp, 0);
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}
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#define libc_feupdateenv libc_feupdateenv_aarch64
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#define libc_feupdateenvf libc_feupdateenv_aarch64
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#define libc_feupdateenvl libc_feupdateenv_aarch64
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static __always_inline void
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libc_feholdsetround_aarch64 (fenv_t *envp, int round)
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{
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fpu_control_t fpcr;
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fpu_fpsr_t fpsr;
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_FPU_GETCW (fpcr);
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_FPU_GETFPSR (fpsr);
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envp->__fpcr = fpcr;
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envp->__fpsr = fpsr;
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/* Check whether rounding modes are different. */
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round = (fpcr ^ round) & _FPU_FPCR_RM_MASK;
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/* Set new rounding mode if different. */
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if (__glibc_unlikely (round != 0))
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_FPU_SETCW (fpcr ^ round);
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}
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#define libc_feholdsetround libc_feholdsetround_aarch64
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#define libc_feholdsetroundf libc_feholdsetround_aarch64
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#define libc_feholdsetroundl libc_feholdsetround_aarch64
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static __always_inline void
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libc_feresetround_aarch64 (fenv_t *envp)
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{
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fpu_control_t fpcr;
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int round;
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_FPU_GETCW (fpcr);
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/* Check whether rounding modes are different. */
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round = (envp->__fpcr ^ fpcr) & _FPU_FPCR_RM_MASK;
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/* Restore the rounding mode if it was changed. */
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if (__glibc_unlikely (round != 0))
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_FPU_SETCW (fpcr ^ round);
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}
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#define libc_feresetround libc_feresetround_aarch64
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#define libc_feresetroundf libc_feresetround_aarch64
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#define libc_feresetroundl libc_feresetround_aarch64
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/* We have support for rounding mode context. */
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#define HAVE_RM_CTX 1
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static __always_inline void
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libc_feholdsetround_aarch64_ctx (struct rm_ctx *ctx, int r)
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{
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fpu_control_t fpcr;
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int round;
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_FPU_GETCW (fpcr);
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ctx->env.__fpcr = fpcr;
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/* Check whether rounding modes are different. */
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round = (fpcr ^ r) & _FPU_FPCR_RM_MASK;
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ctx->updated_status = round != 0;
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/* Set the rounding mode if changed. */
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if (__glibc_unlikely (round != 0))
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_FPU_SETCW (fpcr ^ round);
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}
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#define libc_feholdsetround_ctx libc_feholdsetround_aarch64_ctx
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#define libc_feholdsetroundf_ctx libc_feholdsetround_aarch64_ctx
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#define libc_feholdsetroundl_ctx libc_feholdsetround_aarch64_ctx
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static __always_inline void
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libc_feresetround_aarch64_ctx (struct rm_ctx *ctx)
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{
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/* Restore the rounding mode if updated. */
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if (__glibc_unlikely (ctx->updated_status))
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_FPU_SETCW (ctx->env.__fpcr);
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}
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#define libc_feresetround_ctx libc_feresetround_aarch64_ctx
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#define libc_feresetroundf_ctx libc_feresetround_aarch64_ctx
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#define libc_feresetroundl_ctx libc_feresetround_aarch64_ctx
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static __always_inline void
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libc_feholdsetround_noex_aarch64_ctx (struct rm_ctx *ctx, int r)
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{
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fpu_control_t fpcr;
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fpu_fpsr_t fpsr;
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int round;
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_FPU_GETCW (fpcr);
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_FPU_GETFPSR (fpsr);
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ctx->env.__fpcr = fpcr;
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ctx->env.__fpsr = fpsr;
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/* Check whether rounding modes are different. */
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round = (fpcr ^ r) & _FPU_FPCR_RM_MASK;
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ctx->updated_status = round != 0;
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/* Set the rounding mode if changed. */
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if (__glibc_unlikely (round != 0))
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_FPU_SETCW (fpcr ^ round);
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}
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#define libc_feholdsetround_noex_ctx libc_feholdsetround_noex_aarch64_ctx
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#define libc_feholdsetround_noexf_ctx libc_feholdsetround_noex_aarch64_ctx
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#define libc_feholdsetround_noexl_ctx libc_feholdsetround_noex_aarch64_ctx
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static __always_inline void
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libc_feresetround_noex_aarch64_ctx (struct rm_ctx *ctx)
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{
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/* Restore the rounding mode if updated. */
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if (__glibc_unlikely (ctx->updated_status))
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_FPU_SETCW (ctx->env.__fpcr);
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/* Write new FPSR to restore exception flags. */
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_FPU_SETFPSR (ctx->env.__fpsr);
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}
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#define libc_feresetround_noex_ctx libc_feresetround_noex_aarch64_ctx
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#define libc_feresetround_noexf_ctx libc_feresetround_noex_aarch64_ctx
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#define libc_feresetround_noexl_ctx libc_feresetround_noex_aarch64_ctx
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/* Hack: only include the large arm_neon.h when needed. */
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#ifdef _MATH_CONFIG_H
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# include <arm_neon.h>
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/* ACLE intrinsics for frintn and fcvtns instructions. */
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# define TOINT_INTRINSICS 1
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static inline double_t
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roundtoint (double_t x)
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{
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return vget_lane_f64 (vrndn_f64 (vld1_f64 (&x)), 0);
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}
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static inline uint64_t
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converttoint (double_t x)
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{
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return vcvtnd_s64_f64 (x);
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}
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#endif
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#include_next <math_private.h>
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#endif
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