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121 lines
5.1 KiB
C
121 lines
5.1 KiB
C
/* Dump registers.
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Copyright (C) 1998-2015 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <sys/uio.h>
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#include <_itoa.h>
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/* This prints out the information in the following form: */
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static const char dumpform[] = "\
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Register dump:\n\
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fp0-3: 0000030%0000031% 0000032%0000033% 0000034%0000035% 0000036%0000037%\n\
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fp4-7: 0000038%0000039% 000003a%000003b% 000003c%000003d% 000003e%000003f%\n\
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fp8-11: 0000040%0000041% 0000042%0000043% 0000044%0000045% 0000046%0000047%\n\
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fp12-15: 0000048%0000049% 000004a%000004b% 000004c%000004d% 000004e%000004f%\n\
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fp16-19: 0000050%0000051% 0000052%0000053% 0000054%0000055% 0000056%0000057%\n\
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fp20-23: 0000058%0000059% 000005a%000005b% 000005c%000005d% 000005e%000005f%\n\
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fp24-27: 0000060%0000061% 0000062%0000063% 0000064%0000065% 0000066%0000067%\n\
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fp28-31: 0000068%0000069% 000006a%000006b% 000006c%000006d% 000006e%000006f%\n\
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r0 =0000000% sp =0000001% r2 =0000002% r3 =0000003% trap=0000028%\n\
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r4 =0000004% r5 =0000005% r6 =0000006% r7 =0000007% sr0=0000020% sr1=0000021%\n\
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r8 =0000008% r9 =0000009% r10=000000a% r11=000000b% dar=0000029% dsi=000002a%\n\
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r12=000000c% r13=000000d% r14=000000e% r15=000000f% r3*=0000022%\n\
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r16=0000010% r17=0000011% r18=0000012% r19=0000013%\n\
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r20=0000014% r21=0000015% r22=0000016% r23=0000017% lr=0000024% xer=0000025%\n\
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r24=0000018% r25=0000019% r26=000001a% r27=000001b% mq=0000027% ctr=0000023%\n\
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r28=000001c% r29=000001d% r30=000001e% r31=000001f% fscr=0000071% ccr=0000026%\n\
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";
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/* Most of the fields are self-explanatory. 'sr0' is the next
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instruction to execute, from SRR0, which may have some relationship
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with the instruction that caused the exception. 'r3*' is the value
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that will be returned in register 3 when the current system call
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returns. 'sr1' is SRR1, bits 16-31 of which are copied from the MSR:
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16 - External interrupt enable
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17 - Privilege level (1=user, 0=supervisor)
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18 - FP available
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19 - Machine check enable (if clear, processor locks up on machine check)
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20 - FP exception mode bit 0 (FP exceptions recoverable)
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21 - Single-step trace enable
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22 - Branch trace enable
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23 - FP exception mode bit 1
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25 - exception prefix (if set, exceptions are taken from 0xFFFnnnnn,
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otherwise from 0x000nnnnn).
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26 - Instruction address translation enabled.
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27 - Data address translation enabled.
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30 - Exception is recoverable (otherwise, don't try to return).
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31 - Little-endian mode enable.
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'Trap' is the address of the exception:
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00200 - Machine check exception (memory parity error, for instance)
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00300 - Data access exception (memory not mapped, see dsisr for why)
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00400 - Instruction access exception (memory not mapped)
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00500 - External interrupt
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00600 - Alignment exception (see dsisr for more information)
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00700 - Program exception (illegal/trap instruction, FP exception)
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00800 - FP unavailable (should not be seen by user code)
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00900 - Decrementer exception (for instance, SIGALRM)
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00A00 - I/O controller interface exception
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00C00 - System call exception (for instance, kill(3)).
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00E00 - FP assist exception (optional FP instructions, etc.)
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'dar' is the memory location, for traps 00300, 00400, 00600, 00A00.
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'dsisr' has the following bits under trap 00300:
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0 - direct-store error exception
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1 - no page table entry for page
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4 - memory access not permitted
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5 - trying to access I/O controller space or using lwarx/stwcx on
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non-write-cached memory
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6 - access was store
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9 - data access breakpoint hit
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10 - segment table search failed to find translation (64-bit ppcs only)
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11 - I/O controller instruction not permitted
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For trap 00400, the same bits are set in SRR1 instead.
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For trap 00600, bits 12-31 of the DSISR set to allow emulation of
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the instruction without actually having to read it from memory.
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*/
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#define xtoi(x) (x >= 'a' ? x + 10 - 'a' : x - '0')
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static void
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register_dump (int fd, struct sigcontext *ctx)
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{
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char buffer[sizeof(dumpform)];
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char *bufferpos;
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unsigned regno;
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unsigned *regs = (unsigned *)(ctx->regs);
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memcpy(buffer, dumpform, sizeof(dumpform));
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/* Generate the output. */
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while ((bufferpos = memchr (buffer, '%', sizeof(dumpform))))
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{
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regno = xtoi (bufferpos[-1]) | xtoi (bufferpos[-2]) << 4;
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memset (bufferpos-2, '0', 3);
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_itoa_word (regs[regno], bufferpos+1, 16, 0);
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}
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/* Write the output. */
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write (fd, buffer, sizeof(buffer) - 1);
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}
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#define REGISTER_DUMP \
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register_dump (fd, ctx)
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