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56054664cc
An error "impossible register constraint in 'asm'" was raised on POWER 5 and due to __vector __int128_t being used as operands without passing the option -msvx to gcc. This patch replaces "__vector __int128_t" with "__vector unsigned int" which requires only -maltivec, available since POWER ISA 2.03, and which is already passed to the compiler. * sysdeps/powerpc/powerpc64/tst-ucontext-ppc64-vscr.c: (do_test): Changed __vector __int128_t to __vector unsigned int. Reviewed-by: Tulio Magno Quites Machado Filho <tuliom@linux.ibm.com>
85 lines
2.3 KiB
C
85 lines
2.3 KiB
C
/* Test if POWER vscr read by ucontext.
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Copyright (C) 2018 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <support/check.h>
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#include <sys/auxv.h>
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#include <ucontext.h>
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#include <stdlib.h>
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#include <stdio.h>
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#include <stdint.h>
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#include <altivec.h>
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#define SAT 0x1
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/* This test is supported only on POWER 5 or higher. */
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#define PPC_CPU_SUPPORTED (PPC_FEATURE_POWER5 | PPC_FEATURE_POWER5_PLUS | \
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PPC_FEATURE_ARCH_2_05 | PPC_FEATURE_ARCH_2_06 | \
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PPC_FEATURE2_ARCH_2_07)
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static int
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do_test (void)
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{
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if (!(getauxval(AT_HWCAP2) & PPC_CPU_SUPPORTED))
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{
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if (!(getauxval(AT_HWCAP) & PPC_CPU_SUPPORTED))
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FAIL_UNSUPPORTED("This test is unsupported on POWER < 5\n");
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}
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uint32_t vscr[4] __attribute__ ((aligned (16)));
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uint32_t* vscr_ptr = vscr;
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uint32_t vscr_word;
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ucontext_t ucp;
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__vector unsigned int v0 = {0};
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__vector unsigned int v1 = {0};
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/* Set SAT bit in VSCR register. */
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asm volatile (".machine push;\n"
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".machine \"power5\";\n"
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"vspltisb %0,0;\n"
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"vspltisb %1,-1;\n"
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"vpkuwus %0,%0,%1;\n"
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"mfvscr %0;\n"
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"stvx %0,0,%2;\n"
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".machine pop;"
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: "=v" (v0), "=v" (v1)
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: "r" (vscr_ptr)
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: "memory");
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#if __BYTE_ORDER__ == __ORDER_LITTLE_ENDIAN__
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vscr_word = vscr[0];
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#else
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vscr_word = vscr[3];
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#endif
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if ((vscr_word & SAT) != SAT)
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{
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FAIL_EXIT1("FAIL: SAT bit is not set.\n");
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}
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if (getcontext (&ucp))
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{
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FAIL_EXIT1("FAIL: getcontext error\n");
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}
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if (ucp.uc_mcontext.v_regs->vscr.vscr_word != vscr_word)
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{
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FAIL_EXIT1("FAIL: ucontext vscr does not match with vscr\n");
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}
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return 0;
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}
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#include <support/test-driver.c>
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