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a364304718
Compiler generates the following instruction sequence for GNU2 dynamic
TLS access:
leaq tls_var@TLSDESC(%rip), %rax
call *tls_var@TLSCALL(%rax)
or
leal tls_var@TLSDESC(%ebx), %eax
call *tls_var@TLSCALL(%eax)
CALL instruction is transparent to compiler which assumes all registers,
except for EFLAGS and RAX/EAX, are unchanged after CALL. When
_dl_tlsdesc_dynamic is called, it calls __tls_get_addr on the slow
path. __tls_get_addr is a normal function which doesn't preserve any
caller-saved registers. _dl_tlsdesc_dynamic saved and restored integer
caller-saved registers, but didn't preserve any other caller-saved
registers. Add _dl_tlsdesc_dynamic IFUNC functions for FNSAVE, FXSAVE,
XSAVE and XSAVEC to save and restore all caller-saved registers. This
fixes BZ #31372.
Add GLRO(dl_x86_64_runtime_resolve) with GLRO(dl_x86_tlsdesc_dynamic)
to optimize elf_machine_runtime_setup.
Reviewed-by: Noah Goldstein <goldstein.w.n@gmail.com>
(cherry picked from commit 0aac205a81)
462 lines
14 KiB
C
462 lines
14 KiB
C
/* PLT trampolines. x86-64 version.
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Copyright (C) 2009-2024 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#ifndef SECTION
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# define SECTION(p) p
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#endif
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.section SECTION(.text),"ax",@progbits
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#ifdef _dl_runtime_resolve
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# undef REGISTER_SAVE_AREA
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# undef LOCAL_STORAGE_AREA
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# undef BASE
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# include "dl-trampoline-state.h"
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.globl _dl_runtime_resolve
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.hidden _dl_runtime_resolve
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.type _dl_runtime_resolve, @function
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.align 16
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cfi_startproc
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_dl_runtime_resolve:
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cfi_adjust_cfa_offset(16) # Incorporate PLT
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_CET_ENDBR
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# if DL_RUNTIME_RESOLVE_REALIGN_STACK
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# if LOCAL_STORAGE_AREA != 8
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# error LOCAL_STORAGE_AREA must be 8
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# endif
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pushq %rbx # push subtracts stack by 8.
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cfi_adjust_cfa_offset(8)
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cfi_rel_offset(%rbx, 0)
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mov %RSP_LP, %RBX_LP
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cfi_def_cfa_register(%rbx)
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and $-STATE_SAVE_ALIGNMENT, %RSP_LP
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# endif
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# ifdef REGISTER_SAVE_AREA
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sub $REGISTER_SAVE_AREA, %RSP_LP
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# if !DL_RUNTIME_RESOLVE_REALIGN_STACK
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cfi_adjust_cfa_offset(REGISTER_SAVE_AREA)
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# endif
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# else
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# Allocate stack space of the required size to save the state.
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# if IS_IN (rtld)
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sub _rtld_local_ro+RTLD_GLOBAL_RO_DL_X86_CPU_FEATURES_OFFSET+XSAVE_STATE_SIZE_OFFSET(%rip), %RSP_LP
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# else
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sub _dl_x86_cpu_features+XSAVE_STATE_SIZE_OFFSET(%rip), %RSP_LP
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# endif
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# endif
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# Preserve registers otherwise clobbered.
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movq %rax, REGISTER_SAVE_RAX(%rsp)
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movq %rcx, REGISTER_SAVE_RCX(%rsp)
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movq %rdx, REGISTER_SAVE_RDX(%rsp)
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movq %rsi, REGISTER_SAVE_RSI(%rsp)
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movq %rdi, REGISTER_SAVE_RDI(%rsp)
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movq %r8, REGISTER_SAVE_R8(%rsp)
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movq %r9, REGISTER_SAVE_R9(%rsp)
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# ifdef USE_FXSAVE
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fxsave STATE_SAVE_OFFSET(%rsp)
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# else
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movl $STATE_SAVE_MASK, %eax
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xorl %edx, %edx
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# Clear the XSAVE Header.
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# ifdef USE_XSAVE
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movq %rdx, (STATE_SAVE_OFFSET + 512)(%rsp)
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movq %rdx, (STATE_SAVE_OFFSET + 512 + 8)(%rsp)
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# endif
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movq %rdx, (STATE_SAVE_OFFSET + 512 + 8 * 2)(%rsp)
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movq %rdx, (STATE_SAVE_OFFSET + 512 + 8 * 3)(%rsp)
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movq %rdx, (STATE_SAVE_OFFSET + 512 + 8 * 4)(%rsp)
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movq %rdx, (STATE_SAVE_OFFSET + 512 + 8 * 5)(%rsp)
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movq %rdx, (STATE_SAVE_OFFSET + 512 + 8 * 6)(%rsp)
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movq %rdx, (STATE_SAVE_OFFSET + 512 + 8 * 7)(%rsp)
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# ifdef USE_XSAVE
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xsave STATE_SAVE_OFFSET(%rsp)
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# else
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xsavec STATE_SAVE_OFFSET(%rsp)
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# endif
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# endif
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# Copy args pushed by PLT in register.
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# %rdi: link_map, %rsi: reloc_index
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mov (LOCAL_STORAGE_AREA + 8)(%BASE), %RSI_LP
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mov LOCAL_STORAGE_AREA(%BASE), %RDI_LP
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call _dl_fixup # Call resolver.
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mov %RAX_LP, %R11_LP # Save return value
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# Get register content back.
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# ifdef USE_FXSAVE
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fxrstor STATE_SAVE_OFFSET(%rsp)
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# else
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movl $STATE_SAVE_MASK, %eax
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xorl %edx, %edx
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xrstor STATE_SAVE_OFFSET(%rsp)
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# endif
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movq REGISTER_SAVE_R9(%rsp), %r9
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movq REGISTER_SAVE_R8(%rsp), %r8
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movq REGISTER_SAVE_RDI(%rsp), %rdi
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movq REGISTER_SAVE_RSI(%rsp), %rsi
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movq REGISTER_SAVE_RDX(%rsp), %rdx
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movq REGISTER_SAVE_RCX(%rsp), %rcx
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movq REGISTER_SAVE_RAX(%rsp), %rax
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# if DL_RUNTIME_RESOLVE_REALIGN_STACK
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mov %RBX_LP, %RSP_LP
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cfi_def_cfa_register(%rsp)
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movq (%rsp), %rbx
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cfi_restore(%rbx)
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# endif
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# Adjust stack(PLT did 2 pushes)
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add $(LOCAL_STORAGE_AREA + 16), %RSP_LP
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cfi_adjust_cfa_offset(-(LOCAL_STORAGE_AREA + 16))
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jmp *%r11 # Jump to function address.
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cfi_endproc
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.size _dl_runtime_resolve, .-_dl_runtime_resolve
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#endif
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#if !defined PROF && defined _dl_runtime_profile
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# if (LR_VECTOR_OFFSET % VEC_SIZE) != 0
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# error LR_VECTOR_OFFSET must be multiple of VEC_SIZE
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# endif
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.globl _dl_runtime_profile
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.hidden _dl_runtime_profile
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.type _dl_runtime_profile, @function
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.align 16
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_dl_runtime_profile:
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cfi_startproc
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cfi_adjust_cfa_offset(16) # Incorporate PLT
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_CET_ENDBR
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/* The La_x86_64_regs data structure pointed to by the
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fourth parameter must be VEC_SIZE-byte aligned. This must
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be explicitly enforced. We have the set up a dynamically
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sized stack frame. %rbx points to the top half which
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has a fixed size and preserves the original stack pointer. */
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sub $32, %RSP_LP # Allocate the local storage.
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cfi_adjust_cfa_offset(32)
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movq %rbx, (%rsp)
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cfi_rel_offset(%rbx, 0)
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/* On the stack:
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56(%rbx) parameter #1
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48(%rbx) return address
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40(%rbx) reloc index
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32(%rbx) link_map
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24(%rbx) La_x86_64_regs pointer
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16(%rbx) framesize
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8(%rbx) rax
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(%rbx) rbx
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*/
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movq %rax, 8(%rsp)
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mov %RSP_LP, %RBX_LP
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cfi_def_cfa_register(%rbx)
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/* Actively align the La_x86_64_regs structure. */
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and $-VEC_SIZE, %RSP_LP
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/* sizeof(La_x86_64_regs). Need extra space for 8 SSE registers
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to detect if any xmm0-xmm7 registers are changed by audit
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module. */
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sub $(LR_SIZE + XMM_SIZE*8), %RSP_LP
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movq %rsp, 24(%rbx)
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/* Fill the La_x86_64_regs structure. */
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movq %rdx, LR_RDX_OFFSET(%rsp)
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movq %r8, LR_R8_OFFSET(%rsp)
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movq %r9, LR_R9_OFFSET(%rsp)
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movq %rcx, LR_RCX_OFFSET(%rsp)
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movq %rsi, LR_RSI_OFFSET(%rsp)
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movq %rdi, LR_RDI_OFFSET(%rsp)
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movq %rbp, LR_RBP_OFFSET(%rsp)
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lea 48(%rbx), %RAX_LP
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movq %rax, LR_RSP_OFFSET(%rsp)
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/* We always store the XMM registers even if AVX is available.
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This is to provide backward binary compatibility for existing
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audit modules. */
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VMOVA %xmm0, (LR_XMM_OFFSET + XMM_SIZE*0)(%rsp)
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VMOVA %xmm1, (LR_XMM_OFFSET + XMM_SIZE*1)(%rsp)
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VMOVA %xmm2, (LR_XMM_OFFSET + XMM_SIZE*2)(%rsp)
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VMOVA %xmm3, (LR_XMM_OFFSET + XMM_SIZE*3)(%rsp)
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VMOVA %xmm4, (LR_XMM_OFFSET + XMM_SIZE*4)(%rsp)
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VMOVA %xmm5, (LR_XMM_OFFSET + XMM_SIZE*5)(%rsp)
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VMOVA %xmm6, (LR_XMM_OFFSET + XMM_SIZE*6)(%rsp)
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VMOVA %xmm7, (LR_XMM_OFFSET + XMM_SIZE*7)(%rsp)
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# ifdef RESTORE_AVX
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/* This is to support AVX audit modules. */
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VMOVA %VEC(0), (LR_VECTOR_OFFSET + VECTOR_SIZE*0)(%rsp)
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VMOVA %VEC(1), (LR_VECTOR_OFFSET + VECTOR_SIZE*1)(%rsp)
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VMOVA %VEC(2), (LR_VECTOR_OFFSET + VECTOR_SIZE*2)(%rsp)
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VMOVA %VEC(3), (LR_VECTOR_OFFSET + VECTOR_SIZE*3)(%rsp)
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VMOVA %VEC(4), (LR_VECTOR_OFFSET + VECTOR_SIZE*4)(%rsp)
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VMOVA %VEC(5), (LR_VECTOR_OFFSET + VECTOR_SIZE*5)(%rsp)
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VMOVA %VEC(6), (LR_VECTOR_OFFSET + VECTOR_SIZE*6)(%rsp)
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VMOVA %VEC(7), (LR_VECTOR_OFFSET + VECTOR_SIZE*7)(%rsp)
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/* Save xmm0-xmm7 registers to detect if any of them are
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changed by audit module. */
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vmovdqa %xmm0, (LR_SIZE + XMM_SIZE*0)(%rsp)
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vmovdqa %xmm1, (LR_SIZE + XMM_SIZE*1)(%rsp)
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vmovdqa %xmm2, (LR_SIZE + XMM_SIZE*2)(%rsp)
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vmovdqa %xmm3, (LR_SIZE + XMM_SIZE*3)(%rsp)
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vmovdqa %xmm4, (LR_SIZE + XMM_SIZE*4)(%rsp)
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vmovdqa %xmm5, (LR_SIZE + XMM_SIZE*5)(%rsp)
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vmovdqa %xmm6, (LR_SIZE + XMM_SIZE*6)(%rsp)
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vmovdqa %xmm7, (LR_SIZE + XMM_SIZE*7)(%rsp)
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# endif
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mov %RSP_LP, %RCX_LP # La_x86_64_regs pointer to %rcx.
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mov 48(%rbx), %RDX_LP # Load return address if needed.
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mov 40(%rbx), %RSI_LP # Copy args pushed by PLT in register.
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mov 32(%rbx), %RDI_LP # %rdi: link_map, %rsi: reloc_index
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lea 16(%rbx), %R8_LP # Address of framesize
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call _dl_profile_fixup # Call resolver.
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mov %RAX_LP, %R11_LP # Save return value.
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movq 8(%rbx), %rax # Get back register content.
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movq LR_RDX_OFFSET(%rsp), %rdx
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movq LR_R8_OFFSET(%rsp), %r8
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movq LR_R9_OFFSET(%rsp), %r9
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VMOVA (LR_XMM_OFFSET + XMM_SIZE*0)(%rsp), %xmm0
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VMOVA (LR_XMM_OFFSET + XMM_SIZE*1)(%rsp), %xmm1
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VMOVA (LR_XMM_OFFSET + XMM_SIZE*2)(%rsp), %xmm2
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VMOVA (LR_XMM_OFFSET + XMM_SIZE*3)(%rsp), %xmm3
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VMOVA (LR_XMM_OFFSET + XMM_SIZE*4)(%rsp), %xmm4
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VMOVA (LR_XMM_OFFSET + XMM_SIZE*5)(%rsp), %xmm5
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VMOVA (LR_XMM_OFFSET + XMM_SIZE*6)(%rsp), %xmm6
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VMOVA (LR_XMM_OFFSET + XMM_SIZE*7)(%rsp), %xmm7
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# ifdef RESTORE_AVX
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/* Check if any xmm0-xmm7 registers are changed by audit
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module. */
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vpcmpeqb (LR_SIZE)(%rsp), %xmm0, %xmm8
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vpmovmskb %xmm8, %esi
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incw %si
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je 2f
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vmovdqa %xmm0, (LR_VECTOR_OFFSET)(%rsp)
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jmp 1f
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2: VMOVA (LR_VECTOR_OFFSET)(%rsp), %VEC(0)
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vmovdqa %xmm0, (LR_XMM_OFFSET)(%rsp)
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1: vpcmpeqb (LR_SIZE + XMM_SIZE)(%rsp), %xmm1, %xmm8
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vpmovmskb %xmm8, %esi
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incw %si
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je 2f
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vmovdqa %xmm1, (LR_VECTOR_OFFSET + VECTOR_SIZE)(%rsp)
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jmp 1f
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2: VMOVA (LR_VECTOR_OFFSET + VECTOR_SIZE)(%rsp), %VEC(1)
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vmovdqa %xmm1, (LR_XMM_OFFSET + XMM_SIZE)(%rsp)
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1: vpcmpeqb (LR_SIZE + XMM_SIZE*2)(%rsp), %xmm2, %xmm8
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vpmovmskb %xmm8, %esi
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incw %si
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je 2f
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vmovdqa %xmm2, (LR_VECTOR_OFFSET + VECTOR_SIZE*2)(%rsp)
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jmp 1f
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2: VMOVA (LR_VECTOR_OFFSET + VECTOR_SIZE*2)(%rsp), %VEC(2)
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vmovdqa %xmm2, (LR_XMM_OFFSET + XMM_SIZE*2)(%rsp)
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1: vpcmpeqb (LR_SIZE + XMM_SIZE*3)(%rsp), %xmm3, %xmm8
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vpmovmskb %xmm8, %esi
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incw %si
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je 2f
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vmovdqa %xmm3, (LR_VECTOR_OFFSET + VECTOR_SIZE*3)(%rsp)
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jmp 1f
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2: VMOVA (LR_VECTOR_OFFSET + VECTOR_SIZE*3)(%rsp), %VEC(3)
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vmovdqa %xmm3, (LR_XMM_OFFSET + XMM_SIZE*3)(%rsp)
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1: vpcmpeqb (LR_SIZE + XMM_SIZE*4)(%rsp), %xmm4, %xmm8
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vpmovmskb %xmm8, %esi
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incw %si
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je 2f
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vmovdqa %xmm4, (LR_VECTOR_OFFSET + VECTOR_SIZE*4)(%rsp)
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jmp 1f
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2: VMOVA (LR_VECTOR_OFFSET + VECTOR_SIZE*4)(%rsp), %VEC(4)
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vmovdqa %xmm4, (LR_XMM_OFFSET + XMM_SIZE*4)(%rsp)
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1: vpcmpeqb (LR_SIZE + XMM_SIZE*5)(%rsp), %xmm5, %xmm8
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vpmovmskb %xmm8, %esi
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incw %si
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je 2f
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vmovdqa %xmm5, (LR_VECTOR_OFFSET + VECTOR_SIZE*5)(%rsp)
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jmp 1f
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2: VMOVA (LR_VECTOR_OFFSET + VECTOR_SIZE*5)(%rsp), %VEC(5)
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vmovdqa %xmm5, (LR_XMM_OFFSET + XMM_SIZE*5)(%rsp)
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1: vpcmpeqb (LR_SIZE + XMM_SIZE*6)(%rsp), %xmm6, %xmm8
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vpmovmskb %xmm8, %esi
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incw %si
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je 2f
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vmovdqa %xmm6, (LR_VECTOR_OFFSET + VECTOR_SIZE*6)(%rsp)
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jmp 1f
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2: VMOVA (LR_VECTOR_OFFSET + VECTOR_SIZE*6)(%rsp), %VEC(6)
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vmovdqa %xmm6, (LR_XMM_OFFSET + XMM_SIZE*6)(%rsp)
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1: vpcmpeqb (LR_SIZE + XMM_SIZE*7)(%rsp), %xmm7, %xmm8
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vpmovmskb %xmm8, %esi
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incw %si
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je 2f
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vmovdqa %xmm7, (LR_VECTOR_OFFSET + VECTOR_SIZE*7)(%rsp)
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jmp 1f
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2: VMOVA (LR_VECTOR_OFFSET + VECTOR_SIZE*7)(%rsp), %VEC(7)
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vmovdqa %xmm7, (LR_XMM_OFFSET + XMM_SIZE*7)(%rsp)
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1:
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# endif
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mov 16(%rbx), %RCX_LP # Anything in framesize?
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test %RCX_LP, %RCX_LP
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jns 3f
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/* There's nothing in the frame size, so there
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will be no call to the _dl_audit_pltexit. */
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/* Get back registers content. */
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movq LR_RCX_OFFSET(%rsp), %rcx
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movq LR_RSI_OFFSET(%rsp), %rsi
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movq LR_RDI_OFFSET(%rsp), %rdi
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mov %RBX_LP, %RSP_LP
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movq (%rsp), %rbx
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cfi_restore(%rbx)
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cfi_def_cfa_register(%rsp)
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add $48, %RSP_LP # Adjust the stack to the return value
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# (eats the reloc index and link_map)
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cfi_adjust_cfa_offset(-48)
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jmp *%r11 # Jump to function address.
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3:
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cfi_adjust_cfa_offset(48)
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cfi_rel_offset(%rbx, 0)
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cfi_def_cfa_register(%rbx)
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/* At this point we need to prepare new stack for the function
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which has to be called. We copy the original stack to a
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temporary buffer of the size specified by the 'framesize'
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returned from _dl_profile_fixup */
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lea LR_RSP_OFFSET(%rbx), %RSI_LP # stack
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add $8, %RCX_LP
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and $-16, %RCX_LP
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sub %RCX_LP, %RSP_LP
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mov %RSP_LP, %RDI_LP
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rep movsb
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movq 24(%rdi), %rcx # Get back register content.
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movq 32(%rdi), %rsi
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movq 40(%rdi), %rdi
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call *%r11
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mov 24(%rbx), %RSP_LP # Drop the copied stack content
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/* Now we have to prepare the La_x86_64_retval structure for the
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_dl_audit_pltexit. The La_x86_64_regs is being pointed by rsp now,
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so we just need to allocate the sizeof(La_x86_64_retval) space on
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the stack, since the alignment has already been taken care of. */
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# ifdef RESTORE_AVX
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/* sizeof(La_x86_64_retval). Need extra space for 2 SSE
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registers to detect if xmm0/xmm1 registers are changed
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by audit module. Since rsp is aligned to VEC_SIZE, we
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need to make sure that the address of La_x86_64_retval +
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LRV_VECTOR0_OFFSET is aligned to VEC_SIZE. */
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# define LRV_SPACE (LRV_SIZE + XMM_SIZE*2)
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|
# define LRV_MISALIGNED ((LRV_SIZE + LRV_VECTOR0_OFFSET) & (VEC_SIZE - 1))
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|
# if LRV_MISALIGNED == 0
|
|
sub $LRV_SPACE, %RSP_LP
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|
# else
|
|
sub $(LRV_SPACE + VEC_SIZE - LRV_MISALIGNED), %RSP_LP
|
|
# endif
|
|
# else
|
|
sub $LRV_SIZE, %RSP_LP # sizeof(La_x86_64_retval)
|
|
# endif
|
|
mov %RSP_LP, %RCX_LP # La_x86_64_retval argument to %rcx.
|
|
|
|
/* Fill in the La_x86_64_retval structure. */
|
|
movq %rax, LRV_RAX_OFFSET(%rcx)
|
|
movq %rdx, LRV_RDX_OFFSET(%rcx)
|
|
|
|
VMOVA %xmm0, LRV_XMM0_OFFSET(%rcx)
|
|
VMOVA %xmm1, LRV_XMM1_OFFSET(%rcx)
|
|
|
|
# ifdef RESTORE_AVX
|
|
/* This is to support AVX audit modules. */
|
|
VMOVA %VEC(0), LRV_VECTOR0_OFFSET(%rcx)
|
|
VMOVA %VEC(1), LRV_VECTOR1_OFFSET(%rcx)
|
|
|
|
/* Save xmm0/xmm1 registers to detect if they are changed
|
|
by audit module. */
|
|
vmovdqa %xmm0, (LRV_SIZE + XMM_SIZE*0)(%rcx)
|
|
vmovdqa %xmm1, (LRV_SIZE + XMM_SIZE*1)(%rcx)
|
|
# endif
|
|
|
|
fstpt LRV_ST0_OFFSET(%rcx)
|
|
fstpt LRV_ST1_OFFSET(%rcx)
|
|
|
|
movq 24(%rbx), %rdx # La_x86_64_regs argument to %rdx.
|
|
movq 40(%rbx), %rsi # Copy args pushed by PLT in register.
|
|
movq 32(%rbx), %rdi # %rdi: link_map, %rsi: reloc_index
|
|
call _dl_audit_pltexit
|
|
|
|
/* Restore return registers. */
|
|
movq LRV_RAX_OFFSET(%rsp), %rax
|
|
movq LRV_RDX_OFFSET(%rsp), %rdx
|
|
|
|
VMOVA LRV_XMM0_OFFSET(%rsp), %xmm0
|
|
VMOVA LRV_XMM1_OFFSET(%rsp), %xmm1
|
|
|
|
# ifdef RESTORE_AVX
|
|
/* Check if xmm0/xmm1 registers are changed by audit module. */
|
|
vpcmpeqb (LRV_SIZE)(%rsp), %xmm0, %xmm2
|
|
vpmovmskb %xmm2, %esi
|
|
incw %si
|
|
jne 1f
|
|
VMOVA LRV_VECTOR0_OFFSET(%rsp), %VEC(0)
|
|
|
|
1: vpcmpeqb (LRV_SIZE + XMM_SIZE)(%rsp), %xmm1, %xmm2
|
|
vpmovmskb %xmm2, %esi
|
|
incw %si
|
|
jne 1f
|
|
VMOVA LRV_VECTOR1_OFFSET(%rsp), %VEC(1)
|
|
|
|
1:
|
|
# endif
|
|
|
|
fldt LRV_ST1_OFFSET(%rsp)
|
|
fldt LRV_ST0_OFFSET(%rsp)
|
|
|
|
mov %RBX_LP, %RSP_LP
|
|
movq (%rsp), %rbx
|
|
cfi_restore(%rbx)
|
|
cfi_def_cfa_register(%rsp)
|
|
|
|
add $48, %RSP_LP # Adjust the stack to the return value
|
|
# (eats the reloc index and link_map)
|
|
cfi_adjust_cfa_offset(-48)
|
|
retq
|
|
|
|
cfi_endproc
|
|
.size _dl_runtime_profile, .-_dl_runtime_profile
|
|
#endif
|