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2002-06-05 Brian Youmans <3diff@gnu.org> * sysdeps/ia64/fpu/e_acos.S: Added text of Intel license. * sysdeps/ia64/fpu/e_acosf.S: Likewise. * sysdeps/ia64/fpu/e_acosl.S: Likewise. * sysdeps/ia64/fpu/e_asin.S: Likewise. * sysdeps/ia64/fpu/e_asinf.S: Likewise. * sysdeps/ia64/fpu/e_asinl.S: Likewise. * sysdeps/ia64/fpu/e_atan2.S: Likewise. * sysdeps/ia64/fpu/e_atan2f.S: Likewise. * sysdeps/ia64/fpu/e_cosh.S: Likewise. * sysdeps/ia64/fpu/e_coshf.S: Likewise. * sysdeps/ia64/fpu/e_coshl.S: Likewise. * sysdeps/ia64/fpu/e_exp.S: Likewise. * sysdeps/ia64/fpu/e_expf.S: Likewise. * sysdeps/ia64/fpu/e_fmod.S: Likewise. * sysdeps/ia64/fpu/e_fmodf.S: Likewise. * sysdeps/ia64/fpu/e_fmodl.S: Likewise. * sysdeps/ia64/fpu/e_hypot.S: Likewise. * sysdeps/ia64/fpu/e_hypotf.S: Likewise. * sysdeps/ia64/fpu/e_hypotl.S: Likewise. * sysdeps/ia64/fpu/e_log.S: Likewise. * sysdeps/ia64/fpu/e_logf.S: Likewise. * sysdeps/ia64/fpu/e_pow.S: Likewise. * sysdeps/ia64/fpu/e_powf.S: Likewise. * sysdeps/ia64/fpu/e_powl.S: Likewise. * sysdeps/ia64/fpu/e_remainder.S: Likewise. * sysdeps/ia64/fpu/e_remainderf.S: Likewise. * sysdeps/ia64/fpu/e_remainderl.S: Likewise. * sysdeps/ia64/fpu/e_scalb.S: Likewise. * sysdeps/ia64/fpu/e_scalbf.S: Likewise. * sysdeps/ia64/fpu/e_scalbl.S: Likewise. * sysdeps/ia64/fpu/e_sinh.S: Likewise. * sysdeps/ia64/fpu/e_sinhf.S: Likewise. * sysdeps/ia64/fpu/e_sinhl.S: Likewise. * sysdeps/ia64/fpu/e_sqrt.S: Likewise. * sysdeps/ia64/fpu/e_sqrtf.S: Likewise. * sysdeps/ia64/fpu/e_sqrtl.S: Likewise. * sysdeps/ia64/fpu/libm_atan2_req.S: Likewise. * sysdeps/ia64/fpu/libm_error.c: Likewise. * sysdeps/ia64/fpu/libm_frexp4.S: Likewise. * sysdeps/ia64/fpu/libm_frexp4f.S: Likewise. * sysdeps/ia64/fpu/s_frexpl.c: Likewise. * sysdeps/ia64/fpu/s_ilogb.S: Likewise. * sysdeps/ia64/fpu/s_ilogbf.S: Likewise. * sysdeps/ia64/fpu/s_ilogbl.S: Likewise. * sysdeps/ia64/fpu/s_ldexp.S: Likewise. * sysdeps/ia64/fpu/s_ldexpf.S: Likewise. * sysdeps/ia64/fpu/s_ldexpl.S: Likewise. * sysdeps/ia64/fpu/s_log1p.S: Likewise. * sysdeps/ia64/fpu/s_log1pf.S: Likewise. * sysdeps/ia64/fpu/s_log1pl.S: Likewise. * sysdeps/ia64/fpu/s_logb.S: Likewise. * sysdeps/ia64/fpu/s_logbf.S: Likewise. * sysdeps/ia64/fpu/s_logbl.S: Likewise. * sysdeps/ia64/fpu/s_modf.S: Likewise. * sysdeps/ia64/fpu/s_modff.S: Likewise. * sysdeps/ia64/fpu/s_modfl.S: Likewise. * sysdeps/ia64/fpu/s_nearbyint.S: Likewise. * sysdeps/ia64/fpu/s_nearbyintf.S: Likewise. * sysdeps/ia64/fpu/s_nearbyintl.S: Likewise. * sysdeps/ia64/fpu/s_rint.S: Likewise. * sysdeps/ia64/fpu/s_rintf.S: Likewise. * sysdeps/ia64/fpu/s_rintl.S: Likewise. * sysdeps/ia64/fpu/s_round.S: Likewise. * sysdeps/ia64/fpu/s_roundf.S: Likewise. * sysdeps/ia64/fpu/s_roundl.S: Likewise. * sysdeps/ia64/fpu/s_scalbn.S: Likewise. * sysdeps/ia64/fpu/s_scalbnf.S: Likewise. * sysdeps/ia64/fpu/s_scalbnl.S: Likewise. * sysdeps/ia64/fpu/s_significand.S: Likewise. * sysdeps/ia64/fpu/s_significandf.S: Likewise. * sysdeps/ia64/fpu/s_significandl.S: Likewise. * sysdeps/ia64/fpu/s_tan.S: Likewise. * sysdeps/ia64/fpu/s_tanf.S: Likewise. * sysdeps/ia64/fpu/s_tanl.S: Likewise. * sysdeps/ia64/fpu/s_trunc.S: Likewise. * sysdeps/ia64/fpu/s_truncf.S: Likewise. * sysdeps/ia64/fpu/s_truncl.S: Likewise. * sysdeps/ieee754/dbl-64/doasin.c: Changed copyright notice to reflect IBM donation of math library to FSF * sysdeps/ieee754/dbl-64/dosincos.c: Likewise. * sysdeps/ieee754/dbl-64/e_asin.c: Likewise. * sysdeps/ieee754/dbl-64/e_atan2.c: Likewise. * sysdeps/ieee754/dbl-64/e_exp.c: Likewise. * sysdeps/ieee754/dbl-64/e_log.c: Likewise. * sysdeps/ieee754/dbl-64/e_pow.c: Likewise. * sysdeps/ieee754/dbl-64/e_remainder.c: Likewise. * sysdeps/ieee754/dbl-64/e_sqrt.c: Likewise. * sysdeps/ieee754/dbl-64/halfulp.c: Likewise. * sysdeps/ieee754/dbl-64/mpa.c: Likewise. * sysdeps/ieee754/dbl-64/mpatan.c: Likewise. * sysdeps/ieee754/dbl-64/mpatan2.c: Likewise. * sysdeps/ieee754/dbl-64/mpexp.c: Likewise. * sysdeps/ieee754/dbl-64/mplog.c: Likewise. * sysdeps/ieee754/dbl-64/mpsqrt.c: Likewise. * sysdeps/ieee754/dbl-64/mptan.c: Likewise. * sysdeps/ieee754/dbl-64/s_atan.c: Likewise. * sysdeps/ieee754/dbl-64/s_sin.c: Likewise. * sysdeps/ieee754/dbl-64/s_tan.c: Likewise. * sysdeps/ieee754/dbl-64/sincos32.c: Likewise. * sysdeps/ieee754/dbl-64/slowexp.c: Likewise. * sysdeps/ieee754/dbl-64/slowpow.c: Likewise. * sysdeps/gnu/netinet/udp.h: Added BSD copying permission notice * sysdeps/vax/__longjmp.c: Likewise. * sysdeps/vax/setjmp.c: Likewise. * libio/filedoalloc.c: Fixed BSD copying permission notice to remove advertising clause * sysdeps/vax/htonl.s: Likewise. * sysdeps/vax/htons.s: Likewise. * libio/wfiledoalloc.c: Likewise. * stdlib/random.c: Likewise. * stdlib/random_r.c: Likewise. * sysdeps/mach/sys/reboot.h: Likewise. * inet/getnameinfo.c: Deleted advertising clause from Inner Net License * sysdeps/posix/getaddrinfo.c: Likewise. * sunrpc/des_impl.c: Updated license permission notice to Lesser GPL and corrected pointer to point to the correct license.
199 lines
6.0 KiB
ArmAsm
199 lines
6.0 KiB
ArmAsm
.file "libm_frexp_4f.s"
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// Copyright (C) 2000, 2001, Intel Corporation
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// All rights reserved.
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//
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// Contributed 2/2/2000 by John Harrison, Ted Kubaska, Bob Norin, Shane Story,
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// and Ping Tak Peter Tang of the Computational Software Lab, Intel Corporation.
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// * Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// * The name of Intel Corporation may not be used to endorse or promote
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// products derived from this software without specific prior written
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// permission.
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//
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
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// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Intel Corporation is the author of this code, and requests that all
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// problem reports or change requests be submitted to it directly at
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// http://developer.intel.com/opensource.
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//
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// History
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//==============================================================
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// 2/02/00: Initial version
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// 3/20/00: Improved speed
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// 6/01/00: Fixed bug when x a double-extended denormal
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// 12/08/00 Corrected label on .endp
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//
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// API
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//==============================================================
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// float frexp(float x, int* y)
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// float __libm_frexp_4f(float x, int* y)
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// where int* y is a 32-bit integer
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//
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// Overview of operation
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//==============================================================
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// break a floating point x number into fraction and an exponent
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// The fraction is returned as a float
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// The exponent is returned as an integer pointed to by y
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// This is a true (not a biased exponent) but 0fffe is subtracted
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// as a bias instead of 0xffff. This is because the fraction returned
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// is between 0.5 and 1.0, not the expected IEEE range.
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//
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// The fraction is 0.5 <= fraction < 1.0
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//
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// Registers used
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//==============================================================
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// general registers:
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// r14 exponent bias for x negative
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// r15 exponent bias for x positive
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// r16 signexp of x
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// r17 exponent mask
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// r18 exponent of x
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// r19 exponent result
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// r20 signexp of 2^64
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// r32 on input contains the 32-bit IEEE float that is in f8
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// r33 on input pointer to 32-bit integer for exponent
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// predicate registers:
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// p6 set if x is Nan, zero, or infinity
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// p7 set if x negative
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// p8 set if x positive
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// p9 set if x double-extended denormal
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// floating-point registers:
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// f8 input, output
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// f9 normalized x
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// f10 signexp for significand result for x positive
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// f11 signexp for significand result for x negative
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// f12 2^64
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#include "libm_support.h"
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.align 32
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.global __libm_frexp_4f#
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.section .text
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.proc __libm_frexp_4f#
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.align 32
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__libm_frexp_4f:
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// Set signexp for significand result for x>0
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// If x is a NaN, zero, or infinity, return it.
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// Put 0 in the int pointer.
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// x NAN, ZERO, INFINITY?
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// Set signexp for significand result for x<0
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{ .mfi
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(p0) mov r15 = 0x0fffe
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(p0) fclass.m.unc p6,p0 = f8, 0xe7
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(p0) mov r14 = 0x2fffe
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}
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// Form signexp of 2^64 in case x double-extended denormal
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// Save the normalized value of input in f9
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// The normalization also sets fault flags and takes faults if necessary
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{ .mfi
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(p0) mov r20 = 0x1003f
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(p0) fnorm f9 = f8
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nop.i 999 ;;
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}
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// Move signexp for significand result for x>0 to FP reg
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// Form 2^64 in case x double-extended denormal
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{ .mmi
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(p0) setf.exp f10 = r15
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(p0) setf.exp f12 = r20
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nop.i 999 ;;
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}
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// Move signexp for significand result for x<0 to FP reg
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// If x NAN, ZERO, INFINITY, set *y=0 as a 32-bit integer, and exit
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{ .mmb
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(p0) setf.exp f11 = r14
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(p6) st4 [r33] = r0
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(p6) br.ret.spnt b0 ;;
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}
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// Form exponent mask
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// p7 if x<0, else p8
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{ .mfi
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(p0) mov r17 = 0x1ffff
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(p0) fcmp.lt.unc p7,p8 = f8,f0
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nop.i 999 ;;
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}
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// Test for fnorm(x) denormal, means x double-extended denormal
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{ .mfi
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nop.m 999
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(p0) fclass.m.unc p9,p0 = f9, 0x0b
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nop.i 999 ;;
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}
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// If x double-extended denormal add 64 to exponent bias for scaling
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// If x double-extended denormal multiply x * 2^64 which is normal
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{ .mfi
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(p9) add r15 = 64, r15
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(p9) fmpy f9 = f9, f12
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nop.i 999 ;;
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}
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// true exponent stored to int pointer
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// the bias is treated as 0xfffe instead of
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// normal 0xffff because we want the significand
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// to be in the range <=0.5 sig < 1.0
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// Store the value of the exponent at the pointer in r33
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// If x>0 form significand result
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{ .mfi
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nop.m 999
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(p8) fmerge.se f8 = f10,f9
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nop.i 999 ;;
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}
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// Get signexp of normalized x
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// If x<0 form significand result
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{ .mfi
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(p0) getf.exp r16 = f9
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(p7) fmerge.se f8 = f11,f9
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nop.i 999 ;;
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}
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// Get exp of normalized x
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// Subtract off bias to get true exponent of x
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{ .mmi
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(p0) and r18 = r17,r16 ;;
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(p0) sub r19 = r18,r15
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nop.i 999 ;;
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}
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// Store int y as a 32-bit integer
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// Make the value a float
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{ .mfb
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(p0) st4 [r33] = r19
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(p0) fnorm.s f8 = f8
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(p0) br.ret.sptk b0 ;;
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}
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.endp __libm_frexp_4f
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ASM_SIZE_DIRECTIVE(__libm_frexp_4f)
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