mirror of
https://sourceware.org/git/glibc.git
synced 2024-12-14 07:10:05 +00:00
5a82c74822
Also, change sources.redhat.com to sourceware.org.
This patch was automatically generated by running the following shell
script, which uses GNU sed, and which avoids modifying files imported
from upstream:
sed -ri '
s,(http|ftp)(://(.*\.)?(gnu|fsf|sourceware)\.org($|[^.]|\.[^a-z])),https\2,g
s,(http|ftp)(://(.*\.)?)sources\.redhat\.com($|[^.]|\.[^a-z]),https\2sourceware.org\4,g
' \
$(find $(git ls-files) -prune -type f \
! -name '*.po' \
! -name 'ChangeLog*' \
! -path COPYING ! -path COPYING.LIB \
! -path manual/fdl-1.3.texi ! -path manual/lgpl-2.1.texi \
! -path manual/texinfo.tex ! -path scripts/config.guess \
! -path scripts/config.sub ! -path scripts/install-sh \
! -path scripts/mkinstalldirs ! -path scripts/move-if-change \
! -path INSTALL ! -path locale/programs/charmap-kw.h \
! -path po/libc.pot ! -path sysdeps/gnu/errlist.c \
! '(' -name configure \
-execdir test -f configure.ac -o -f configure.in ';' ')' \
! '(' -name preconfigure \
-execdir test -f preconfigure.ac ';' ')' \
-print)
and then by running 'make dist-prepare' to regenerate files built
from the altered files, and then executing the following to cleanup:
chmod a+x sysdeps/unix/sysv/linux/riscv/configure
# Omit irrelevant whitespace and comment-only changes,
# perhaps from a slightly-different Autoconf version.
git checkout -f \
sysdeps/csky/configure \
sysdeps/hppa/configure \
sysdeps/riscv/configure \
sysdeps/unix/sysv/linux/csky/configure
# Omit changes that caused a pre-commit check to fail like this:
# remote: *** error: sysdeps/powerpc/powerpc64/ppc-mcount.S: trailing lines
git checkout -f \
sysdeps/powerpc/powerpc64/ppc-mcount.S \
sysdeps/unix/sysv/linux/s390/s390-64/syscall.S
# Omit change that caused a pre-commit check to fail like this:
# remote: *** error: sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S: last line does not end in newline
git checkout -f sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S
414 lines
10 KiB
ArmAsm
414 lines
10 KiB
ArmAsm
/* Optimized strcpy/stpcpy implementation for PowerPC64/POWER8.
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Copyright (C) 2015-2019 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#ifdef USE_AS_STPCPY
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# ifndef STPCPY
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# define FUNC_NAME __stpcpy
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# else
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# define FUNC_NAME STPCPY
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# endif
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#else
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# ifndef STRCPY
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# define FUNC_NAME strcpy
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# else
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# define FUNC_NAME STRCPY
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# endif
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#endif /* !USE_AS_STPCPY */
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/* Implements the function
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char * [r3] strcpy (char *dest [r3], const char *src [r4])
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or
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char * [r3] stpcpy (char *dest [r3], const char *src [r4])
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if USE_AS_STPCPY is defined.
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The implementation uses unaligned doubleword access to avoid specialized
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code paths depending of data alignment. Although recent powerpc64 uses
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64K as default, the page cross handling assumes minimum page size of
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4k. */
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.machine power8
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ENTRY_TOCLESS (FUNC_NAME, 4)
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li r0,0 /* Doubleword with null chars to use
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with cmpb. */
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/* Check if the [src]+15 will cross a 4K page by checking if the bit
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indicating the page size changes. Basically:
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uint64_t srcin = (uint64_t)src;
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uint64_t ob = srcin & 4096UL;
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uint64_t nb = (srcin+15UL) & 4096UL;
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if (ob ^ nb)
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goto pagecross; */
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addi r9,r4,15
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xor r9,r9,r4
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rlwinm. r9,r9,0,19,19
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bne L(pagecross)
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/* For short string (less than 16 bytes), just calculate its size as
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strlen and issues a memcpy if null is found. */
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mr r7,r4
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ld r12,0(r7) /* Load doubleword from memory. */
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cmpb r10,r12,r0 /* Check for null bytes in DWORD1. */
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cmpdi cr7,r10,0 /* If r10 == 0, no null's have been found. */
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bne cr7,L(done)
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ldu r8,8(r7)
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cmpb r10,r8,r0
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cmpdi cr7,r10,0
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bne cr7,L(done)
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b L(loop_before)
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.align 4
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L(pagecross):
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clrrdi r7,r4,3 /* Align the address to doubleword boundary. */
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rlwinm r6,r4,3,26,28 /* Calculate padding. */
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li r5,-1 /* MASK = 0xffffffffffffffff. */
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ld r12,0(r7) /* Load doubleword from memory. */
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#ifdef __LITTLE_ENDIAN__
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sld r5,r5,r6
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#else
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srd r5,r5,r6 /* MASK = MASK >> padding. */
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#endif
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orc r9,r12,r5 /* Mask bits that are not part of the string. */
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cmpb r10,r9,r0 /* Check for null bytes in DWORD1. */
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cmpdi cr7,r10,0 /* If r10 == 0, no null's have been found. */
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bne cr7,L(done)
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ldu r6,8(r7)
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cmpb r10,r6,r0
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cmpdi cr7,r10,0
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bne cr7,L(done)
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ld r12,0(r7)
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cmpb r10,r12,r0
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cmpdi cr7,r10,0
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bne cr7,L(done)
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ldu r6,8(r7)
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cmpb r10,r6,r0
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cmpdi cr7,r10,0
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bne cr7,L(done)
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/* We checked for 24 - x bytes, with x being the source alignment
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(0 <= x <= 16), and no zero has been found. Start the loop
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copy with doubleword aligned address. */
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mr r7,r4
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ld r12, 0(r7)
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ldu r8, 8(r7)
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L(loop_before):
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/* Save the two doublewords read from source and align the source
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to 16 bytes for the loop. */
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mr r11,r3
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std r12,0(r11)
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std r8,8(r11)
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addi r11,r11,16
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rldicl r9,r4,0,60
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subf r7,r9,r7
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subf r11,r9,r11
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/* Source is adjusted to 16B alignment and destination r11 is
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also moved based on that adjustment. Now check if r11 is
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also 16B aligned to move to vectorized loop. */
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andi. r6, r11, 0xF
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bne L(loop_start)
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/* Prepare for the loop. */
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subf r4, r9, r4 /* Adjust r4 based on alignment. */
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li r7, 16 /* Load required offsets. */
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li r8, 32
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li r9, 48
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vspltisb v0, 0
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addi r4, r4, 16
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/* Are we 64-byte aligned? If so, jump to the vectorized loop.
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Else copy 16B till r4 is 64B aligned. */
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andi. r6, r4, 63
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beq L(qw_loop)
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lvx v6, 0, r4 /* Load 16 bytes from memory. */
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vcmpequb. v5, v0, v6 /* Check for null. */
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bne cr6, L(qw_done)
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stvx v6, 0, r11 /* Store 16 bytes. */
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addi r4, r4, 16 /* Increment the address. */
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addi r11, r11, 16
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andi. r6, r4, 63
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beq L(qw_loop)
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lvx v6, 0, r4
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vcmpequb. v5, v0, v6
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bne cr6, L(qw_done)
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stvx v6, 0, r11
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addi r4, r4, 16
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addi r11, r11, 16
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andi. r6, r4, 63
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beq L(qw_loop)
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lvx v6, 0, r4
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vcmpequb. v5, v0, v6
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bne cr6, L(qw_done)
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stvx v6, 0, r11
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addi r4, r4, 16
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addi r11, r11, 16
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.align 4
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L(qw_loop):
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lvx v1, r4, r0 /* Load 4 quadwords. */
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lvx v2, r4, r7
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lvx v3, r4, r8
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lvx v4, r4, r9
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vminub v5, v1, v2 /* Compare and merge into one VR for speed. */
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vminub v8, v3, v4
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vminub v7, v5, v8
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vcmpequb. v7, v7, v0 /* Check for NULLs. */
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bne cr6, L(qw_loop_done)
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stvx v1, r11, r0 /* Store 4 quadwords. */
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stvx v2, r11, r7
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stvx v3, r11, r8
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stvx v4, r11, r9
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addi r4, r4, 64 /* Adjust address for the next iteration. */
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addi r11, r11, 64 /* Adjust address for the next iteration. */
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lvx v1, r4, r0 /* Load 4 quadwords. */
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lvx v2, r4, r7
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lvx v3, r4, r8
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lvx v4, r4, r9
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vminub v5, v1, v2 /* Compare and merge into one VR for speed. */
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vminub v8, v3, v4
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vminub v7, v5, v8
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vcmpequb. v7, v7, v0 /* Check for NULLs. */
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bne cr6, L(qw_loop_done)
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stvx v1, r11, r0 /* Store 4 quadwords. */
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stvx v2, r11, r7
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stvx v3, r11, r8
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stvx v4, r11, r9
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addi r4, r4, 64 /* Adjust address for the next iteration. */
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addi r11, r11, 64 /* Adjust address for the next iteration. */
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lvx v1, r4, r0 /* Load 4 quadwords. */
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lvx v2, r4, r7
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lvx v3, r4, r8
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lvx v4, r4, r9
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vminub v5, v1, v2 /* Compare and merge into one VR for speed. */
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vminub v8, v3, v4
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vminub v7, v5, v8
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vcmpequb. v7, v7, v0 /* Check for NULLs. */
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bne cr6, L(qw_loop_done)
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stvx v1, r11, r0 /* Store 4 quadwords. */
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stvx v2, r11, r7
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stvx v3, r11, r8
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stvx v4, r11, r9
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addi r4, r4, 64 /* Adjust address for the next iteration. */
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addi r11, r11, 64 /* Adjust address for the next iteration. */
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b L(qw_loop)
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.align 4
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L(qw_loop_done):
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/* Null found in one of the 4 loads. */
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vcmpequb. v7, v1, v0
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vor v6, v1, v1
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bne cr6, L(qw_done)
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/* Not on the first 16B, So store it. */
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stvx v1, r11, r0
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addi r4, r4, 16
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addi r11, r11, 16
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vcmpequb. v7, v2, v0
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vor v6, v2, v2
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bne cr6, L(qw_done)
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/* Not on the second 16B, So store it. */
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stvx v2, r11, r0
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addi r4, r4, 16
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addi r11, r11, 16
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vcmpequb. v7, v3, v0
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vor v6, v3, v3
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bne cr6, L(qw_done)
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/* Not on the third 16B, So store it. */
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stvx v6, r11, r0
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addi r4, r4, 16
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addi r11, r11, 16
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vor v6, v4, v4
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.align 4
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L(qw_done):
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mr r7, r4
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/* Move the result to GPR. */
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#ifdef __LITTLE_ENDIAN__
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vsldoi v4, v6, v0, 8
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mfvrd r12, v4
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#else
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mfvrd r12, v6
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#endif
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/* Check for null in the first 8 bytes. */
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cmpb r10, r12, r0
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cmpdi cr6, r10, 0
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bne cr6, L(done2)
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/* Null found in second doubleword. */
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#ifdef __LITTLE_ENDIAN__
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mfvrd r6, v6
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#else
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vsldoi v6, v6, v0, 8
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mfvrd r6, v6
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#endif
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cmpb r10, r6, r0
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addi r7, r7, 8
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b L(done2)
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.align 5
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L(loop):
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std r12, 0(r11)
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std r6, 8(r11)
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addi r11,r11,16
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L(loop_start):
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/* Load two doublewords, compare and merge in a
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single register for speed. This is an attempt
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to speed up the null-checking process for bigger strings. */
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ld r12, 8(r7)
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ldu r6, 16(r7)
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cmpb r10,r12,r0
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cmpb r9,r6,r0
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or r8,r9,r10 /* Merge everything in one doubleword. */
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cmpdi cr7,r8,0
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beq cr7,L(loop)
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/* OK, one (or both) of the doublewords contains a null byte. Check
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the first doubleword and decrement the address in case the first
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doubleword really contains a null byte. */
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addi r4,r7,-8
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cmpdi cr6,r10,0
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addi r7,r7,-8
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bne cr6,L(done2)
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/* The null byte must be in the second doubleword. Adjust the address
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again and move the result of cmpb to r10 so we can calculate the
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length. */
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mr r10,r9
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addi r7,r7,8
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b L(done2)
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/* r10 has the output of the cmpb instruction, that is, it contains
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0xff in the same position as the null byte in the original
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doubleword from the string. Use that to calculate the length. */
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L(done):
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mr r11,r3
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L(done2):
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#ifdef __LITTLE_ENDIAN__
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addi r9, r10, -1 /* Form a mask from trailing zeros. */
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andc r9, r9, r10
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popcntd r6, r9 /* Count the bits in the mask. */
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#else
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cntlzd r6,r10 /* Count leading zeros before the match. */
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#endif
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subf r5,r4,r7
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srdi r6,r6,3 /* Convert leading/trailing zeros to bytes. */
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add r8,r5,r6 /* Compute final length. */
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#ifdef USE_AS_STPCPY
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/* stpcpy returns the dest address plus the size not counting the
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final '\0'. */
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add r3,r11,r8
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#endif
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addi r8,r8,1 /* Final '/0'. */
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cmpldi cr6,r8,8
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mtocrf 0x01,r8
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ble cr6,L(copy_LE_8)
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cmpldi cr1,r8,16
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blt cr1,8f
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/* Handle copies of 0~31 bytes. */
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.align 4
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L(copy_LT_32):
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/* At least 6 bytes to go. */
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blt cr1,8f
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/* Copy 16 bytes. */
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ld r6,0(r4)
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ld r8,8(r4)
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addi r4,r4,16
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std r6,0(r11)
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std r8,8(r11)
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addi r11,r11,16
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8: /* Copy 8 bytes. */
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bf 28,L(tail4)
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ld r6,0(r4)
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addi r4,r4,8
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std r6,0(r11)
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addi r11,r11,8
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.align 4
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/* Copies 4~7 bytes. */
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L(tail4):
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bf 29,L(tail2)
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lwz r6,0(r4)
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stw r6,0(r11)
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bf 30,L(tail5)
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lhz r7,4(r4)
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sth r7,4(r11)
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bflr 31
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lbz r8,6(r4)
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stb r8,6(r11)
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blr
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.align 4
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/* Copies 2~3 bytes. */
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L(tail2):
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bf 30,1f
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lhz r6,0(r4)
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sth r6,0(r11)
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bflr 31
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lbz r7,2(r4)
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stb r7,2(r11)
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blr
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.align 4
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L(tail5):
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bf 31,1f
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lbz r6,4(r4)
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stb r6,4(r11)
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blr
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.align 4
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1:
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bflr 31
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lbz r6,0(r4)
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stb r6,0(r11)
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blr
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/* Handles copies of 0~8 bytes. */
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.align 4
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L(copy_LE_8):
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bne cr6,L(tail4)
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ld r6,0(r4)
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std r6,0(r11)
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blr
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END (FUNC_NAME)
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#ifndef USE_AS_STPCPY
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libc_hidden_builtin_def (strcpy)
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#endif
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