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This patch contains hardware floating-point support for the RISC-V ISA.
While we currently only support hard-float systems with both the F and D
extensions, I've left the F-specific code split out into seperate
folders in order to ease adding support for F-only and RV32I-based
systems in the future. I gave this a quick once-over and believe I've
removed all the code that implements RV32IF, RV32IFD, and RV64IF
targets.
2018-01-29 Palmer Dabbelt <palmer@sifive.com>
* sysdeps/riscv/rv64/rvd/s_ceil.c: New file.
* sysdeps/riscv/rv64/rvd/s_floor.c: Likewise.
* sysdeps/riscv/rv64/rvd/s_llrint.c: Likewise.
* sysdeps/riscv/rv64/rvd/s_llround.c: Likewise.
* sysdeps/riscv/rv64/rvd/s_lrint.c: Likewise.
* sysdeps/riscv/rv64/rvd/s_lround.c: Likewise.
* sysdeps/riscv/rv64/rvd/s_nearbyint.c: Likewise.
* sysdeps/riscv/rv64/rvd/s_rint.c: Likewise.
* sysdeps/riscv/rv64/rvd/s_round.c: Likewise.
* sysdeps/riscv/rv64/rvd/s_roundeven.c: Likewise.
* sysdeps/riscv/rv64/rvd/s_trunc.c: Likewise.
* sysdeps/riscv/rv64/rvf/s_llrintf.c: Likewise.
* sysdeps/riscv/rv64/rvf/s_llroundf.c: Likewise.
* sysdeps/riscv/rv64/rvf/s_lrintf.c: Likewise.
* sysdeps/riscv/rv64/rvf/s_lroundf.c: Likewise.
* sysdeps/riscv/rvd/e_sqrt.c: Likewise.
* sysdeps/riscv/rvd/s_copysign.c: Likewise.
* sysdeps/riscv/rvd/s_finite.c: Likewise.
* sysdeps/riscv/rvd/s_fma.c: Likewise.
* sysdeps/riscv/rvd/s_fmax.c: Likewise.
* sysdeps/riscv/rvd/s_fmin.c: Likewise.
* sysdeps/riscv/rvd/s_fpclassify.c: Likewise.
* sysdeps/riscv/rvd/s_isinf.c: Likewise.
* sysdeps/riscv/rvd/s_isnan.c: Likewise.
* sysdeps/riscv/rvd/s_issignaling.c: Likewise.
* sysdeps/riscv/rvf/e_sqrtf.c: Likewise.
* sysdeps/riscv/rvf/fclrexcpt.c: Likewise.
* sysdeps/riscv/rvf/fegetenv.c: Likewise.
* sysdeps/riscv/rvf/fegetmode.c: Likewise.
* sysdeps/riscv/rvf/fegetround.c: Likewise.
* sysdeps/riscv/rvf/feholdexcpt.c: Likewise.
* sysdeps/riscv/rvf/fesetenv.c: Likewise.
* sysdeps/riscv/rvf/fesetexcept.c: Likewise.
* sysdeps/riscv/rvf/fesetmode.c: Likewise.
* sysdeps/riscv/rvf/fesetround.c: Likewise.
* sysdeps/riscv/rvf/feupdateenv.c: Likewise.
* sysdeps/riscv/rvf/fgetexcptflg.c: Likewise.
* sysdeps/riscv/rvf/fraiseexcpt.c: Likewise.
* sysdeps/riscv/rvf/fsetexcptflg.c: Likewise.
* sysdeps/riscv/rvf/ftestexcept.c: Likewise.
* sysdeps/riscv/rvf/get-rounding-mode.h: Likewise.
* sysdeps/riscv/rvf/math_private.h: Likewise.
* sysdeps/riscv/rvf/s_ceilf.c: Likewise.
* sysdeps/riscv/rvf/s_copysignf.c: Likewise.
* sysdeps/riscv/rvf/s_finitef.c: Likewise.
* sysdeps/riscv/rvf/s_floorf.c: Likewise.
* sysdeps/riscv/rvf/s_fmaf.c: Likewise.
* sysdeps/riscv/rvf/s_fmaxf.c: Likewise.
* sysdeps/riscv/rvf/s_fminf.c: Likewise.
* sysdeps/riscv/rvf/s_fpclassifyf.c: Likewise.
* sysdeps/riscv/rvf/s_isinff.c: Likewise.
* sysdeps/riscv/rvf/s_isnanf.c: Likewise.
* sysdeps/riscv/rvf/s_issignalingf.c: Likewise.
* sysdeps/riscv/rvf/s_nearbyintf.c: Likewise.
* sysdeps/riscv/rvf/s_rintf.c: Likewise.
* sysdeps/riscv/rvf/s_roundevenf.c: Likewise.
* sysdeps/riscv/rvf/s_roundf.c: Likewise.
* sysdeps/riscv/rvf/s_truncf.c: Likewise.
27 lines
955 B
C
27 lines
955 B
C
/* Set given exception flags. RISC-V version.
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Copyright (C) 2017-2018 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<http://www.gnu.org/licenses/>. */
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#include <fenv.h>
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int
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fesetexcept (int excepts)
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{
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asm volatile ("csrs fflags, %0" : : "r" (excepts));
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return 0;
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}
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