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https://sourceware.org/git/glibc.git
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5a82c74822
Also, change sources.redhat.com to sourceware.org.
This patch was automatically generated by running the following shell
script, which uses GNU sed, and which avoids modifying files imported
from upstream:
sed -ri '
s,(http|ftp)(://(.*\.)?(gnu|fsf|sourceware)\.org($|[^.]|\.[^a-z])),https\2,g
s,(http|ftp)(://(.*\.)?)sources\.redhat\.com($|[^.]|\.[^a-z]),https\2sourceware.org\4,g
' \
$(find $(git ls-files) -prune -type f \
! -name '*.po' \
! -name 'ChangeLog*' \
! -path COPYING ! -path COPYING.LIB \
! -path manual/fdl-1.3.texi ! -path manual/lgpl-2.1.texi \
! -path manual/texinfo.tex ! -path scripts/config.guess \
! -path scripts/config.sub ! -path scripts/install-sh \
! -path scripts/mkinstalldirs ! -path scripts/move-if-change \
! -path INSTALL ! -path locale/programs/charmap-kw.h \
! -path po/libc.pot ! -path sysdeps/gnu/errlist.c \
! '(' -name configure \
-execdir test -f configure.ac -o -f configure.in ';' ')' \
! '(' -name preconfigure \
-execdir test -f preconfigure.ac ';' ')' \
-print)
and then by running 'make dist-prepare' to regenerate files built
from the altered files, and then executing the following to cleanup:
chmod a+x sysdeps/unix/sysv/linux/riscv/configure
# Omit irrelevant whitespace and comment-only changes,
# perhaps from a slightly-different Autoconf version.
git checkout -f \
sysdeps/csky/configure \
sysdeps/hppa/configure \
sysdeps/riscv/configure \
sysdeps/unix/sysv/linux/csky/configure
# Omit changes that caused a pre-commit check to fail like this:
# remote: *** error: sysdeps/powerpc/powerpc64/ppc-mcount.S: trailing lines
git checkout -f \
sysdeps/powerpc/powerpc64/ppc-mcount.S \
sysdeps/unix/sysv/linux/s390/s390-64/syscall.S
# Omit change that caused a pre-commit check to fail like this:
# remote: *** error: sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S: last line does not end in newline
git checkout -f sysdeps/sparc/sparc64/multiarch/memcpy-ultra3.S
501 lines
11 KiB
ArmAsm
501 lines
11 KiB
ArmAsm
/* PLT trampolines. PPC64 version.
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Copyright (C) 2005-2019 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#include <rtld-global-offsets.h>
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.section ".text"
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/* On entry r0 contains the index of the PLT entry we need to fixup
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and r11 contains the link_map (from PLT0+16). The link_map becomes
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parm1 (r3) and the index (r0) need to be converted to an offset
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(index * 24) in parm2 (r4). */
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#define FRAME_SIZE (FRAME_MIN_SIZE+64)
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/* We need to save the registers used to pass parameters, ie. r3 thru
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r10; Use local var space rather than the parameter save area,
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because gcc as of 2010/05 doesn't allocate a proper stack frame for
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a function that makes no calls except for __tls_get_addr and we
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might be here resolving the __tls_get_addr call. */
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#define INT_PARMS FRAME_MIN_SIZE
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ENTRY (_dl_runtime_resolve, 4)
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stdu r1,-FRAME_SIZE(r1)
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cfi_adjust_cfa_offset (FRAME_SIZE)
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std r3,INT_PARMS+0(r1)
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mr r3,r11
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std r4,INT_PARMS+8(r1)
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sldi r4,r0,1
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std r5,INT_PARMS+16(r1)
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add r4,r4,r0
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std r6,INT_PARMS+24(r1)
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sldi r4,r4,3
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std r7,INT_PARMS+32(r1)
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mflr r0
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std r8,INT_PARMS+40(r1)
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/* Store the LR in the LR Save area. */
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std r0,FRAME_SIZE+FRAME_LR_SAVE(r1)
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cfi_offset (lr, FRAME_LR_SAVE)
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std r9,INT_PARMS+48(r1)
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std r10,INT_PARMS+56(r1)
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bl JUMPTARGET(_dl_fixup)
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#ifndef SHARED
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nop
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#endif
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/* Put the registers back. */
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ld r0,FRAME_SIZE+FRAME_LR_SAVE(r1)
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ld r10,INT_PARMS+56(r1)
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ld r9,INT_PARMS+48(r1)
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ld r8,INT_PARMS+40(r1)
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ld r7,INT_PARMS+32(r1)
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mtlr r0
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ld r6,INT_PARMS+24(r1)
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ld r5,INT_PARMS+16(r1)
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ld r4,INT_PARMS+8(r1)
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/* Prepare for calling the function returned by fixup. */
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PPC64_LOAD_FUNCPTR r3
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ld r3,INT_PARMS+0(r1)
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#if _CALL_ELF == 2
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/* Restore the caller's TOC in case we jump to a local entry point. */
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ld r2,FRAME_SIZE+FRAME_TOC_SAVE(r1)
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#endif
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/* Unwind the stack frame, and jump. */
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addi r1,r1,FRAME_SIZE
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bctr
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END(_dl_runtime_resolve)
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#undef FRAME_SIZE
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#undef INT_PARMS
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/* Stack layout: ELFv2 ABI.
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+752 previous backchain
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+744 spill_r31
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+736 spill_r30
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+720 v8
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+704 v7
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+688 v6
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+672 v5
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+656 v4
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+640 v3
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+624 v2
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+608 v1
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+600 fp10
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ELFv1 ABI +592 fp9
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+592 previous backchain +584 fp8
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+584 spill_r31 +576 fp7
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+576 spill_r30 +568 fp6
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+560 v1 +560 fp5
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+552 fp4 +552 fp4
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+544 fp3 +544 fp3
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+536 fp2 +536 fp2
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+528 fp1 +528 fp1
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+520 r4 +520 r4
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+512 r3 +512 r3
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return values
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+504 free
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+496 stackframe
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+488 lr
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+480 r1
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+464 v13
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+448 v12
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+432 v11
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+416 v10
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+400 v9
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+384 v8
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+368 v7
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+352 v6
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+336 v5
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+320 v4
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+304 v3
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+288 v2
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* VMX Parms in V2-V13, V0-V1 are scratch
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+284 vrsave
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+280 free
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+272 fp13
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+264 fp12
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+256 fp11
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+248 fp10
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+240 fp9
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+232 fp8
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+224 fp7
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+216 fp6
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+208 fp5
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+200 fp4
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+192 fp3
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+184 fp2
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+176 fp1
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* FP Parms in FP1-FP13, FP0 is a scratch register
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+168 r10
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+160 r9
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+152 r8
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+144 r7
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+136 r6
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+128 r5
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+120 r4
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+112 r3
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* Integer parms in R3-R10, R0 is scratch, R1 SP, R2 is TOC
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+104 parm8
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+96 parm7
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+88 parm6
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+80 parm5
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+72 parm4
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+64 parm3
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+56 parm2
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+48 parm1
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* Parameter save area
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* (v1 ABI: Allocated by the call, at least 8 double words)
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+40 v1 ABI: TOC save area
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+32 v1 ABI: Reserved for linker
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+24 v1 ABI: Reserved for compiler / v2 ABI: TOC save area
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+16 LR save area
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+8 CR save area
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r1+0 stack back chain
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*/
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#if _CALL_ELF == 2
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# define FRAME_SIZE 752
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# define VR_RTN 608
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#else
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# define FRAME_SIZE 592
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# define VR_RTN 560
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#endif
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#define INT_RTN 512
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#define FPR_RTN 528
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#define STACK_FRAME 496
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#define CALLING_LR 488
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#define CALLING_SP 480
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#define INT_PARMS 112
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#define FPR_PARMS 176
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#define VR_PARMS 288
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#define VR_VRSAVE 284
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.section ".toc","aw"
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.LC__dl_hwcap:
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# ifdef SHARED
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.tc _rtld_local_ro[TC],_rtld_local_ro
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# else
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.tc _dl_hwcap[TC],_dl_hwcap
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# endif
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.section ".text"
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.machine "altivec"
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/* On entry r0 contains the index of the PLT entry we need to fixup
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and r11 contains the link_map (from PLT0+16). The link_map becomes
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parm1 (r3) and the index (r0) needs to be converted to an offset
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(index * 24) in parm2 (r4). */
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#ifndef PROF
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ENTRY (_dl_profile_resolve, 4)
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/* Spill r30, r31 to preserve the link_map* and reloc_addr, in case we
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need to call _dl_call_pltexit. */
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std r31,-8(r1)
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std r30,-16(r1)
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/* We need to save the registers used to pass parameters, ie. r3 thru
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r10; the registers are saved in a stack frame. */
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stdu r1,-FRAME_SIZE(r1)
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cfi_adjust_cfa_offset (FRAME_SIZE)
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cfi_offset(r31,-8)
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cfi_offset(r30,-16)
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std r3,INT_PARMS+0(r1)
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mr r3,r11
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std r4,INT_PARMS+8(r1)
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sldi r4,r0,1 /* index * 2 */
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std r5,INT_PARMS+16(r1)
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add r4,r4,r0 /* index * 3 */
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std r6,INT_PARMS+24(r1)
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sldi r4,r4,3 /* index * 24 == PLT offset */
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mflr r5
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std r7,INT_PARMS+32(r1)
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std r8,INT_PARMS+40(r1)
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/* Store the LR in the LR Save area. */
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la r8,FRAME_SIZE(r1)
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std r5,FRAME_SIZE+FRAME_LR_SAVE(r1)
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cfi_offset (lr, FRAME_LR_SAVE)
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std r5,CALLING_LR(r1)
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std r9,INT_PARMS+48(r1)
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std r10,INT_PARMS+56(r1)
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std r8,CALLING_SP(r1)
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ld r12,.LC__dl_hwcap@toc(r2)
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#ifdef SHARED
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/* Load _rtld_local_ro._dl_hwcap. */
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ld r12,RTLD_GLOBAL_RO_DL_HWCAP_OFFSET(r12)
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#else
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ld r12,0(r12) /* Load extern _dl_hwcap. */
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#endif
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andis. r0,r12,(PPC_FEATURE_HAS_ALTIVEC >> 16)
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beq L(saveFP)
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la r10,(VR_PARMS+0)(r1)
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la r9,(VR_PARMS+16)(r1)
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li r11,32
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li r12,64
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stvx v2,0,r10
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stvx v3,0,r9
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stvx v4,r11,r10
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stvx v5,r11,r9
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addi r11,r11,64
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stvx v6,r12,r10
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stvx v7,r12,r9
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addi r12,r12,64
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stvx v8,r11,r10
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stvx v9,r11,r9
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addi r11,r11,64
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stvx v10,r12,r10
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stvx v11,r12,r9
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mfspr r0,VRSAVE
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stvx v12,r11,r10
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stvx v13,r11,r9
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L(saveFP):
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stw r0,VR_VRSAVE(r1)
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/* Save floating registers. */
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stfd fp1,FPR_PARMS+0(r1)
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stfd fp2,FPR_PARMS+8(r1)
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stfd fp3,FPR_PARMS+16(r1)
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stfd fp4,FPR_PARMS+24(r1)
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stfd fp5,FPR_PARMS+32(r1)
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stfd fp6,FPR_PARMS+40(r1)
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stfd fp7,FPR_PARMS+48(r1)
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stfd fp8,FPR_PARMS+56(r1)
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stfd fp9,FPR_PARMS+64(r1)
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stfd fp10,FPR_PARMS+72(r1)
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stfd fp11,FPR_PARMS+80(r1)
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li r0,-1
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stfd fp12,FPR_PARMS+88(r1)
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stfd fp13,FPR_PARMS+96(r1)
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/* Load the extra parameters. */
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addi r6,r1,INT_PARMS
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addi r7,r1,STACK_FRAME
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/* Save link_map* and reloc_addr parms for later. */
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mr r31,r3
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mr r30,r4
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std r0,0(r7)
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bl JUMPTARGET(_dl_profile_fixup)
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#ifndef SHARED
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nop
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#endif
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/* Test *framesizep > 0 to see if need to do pltexit processing. */
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ld r0,STACK_FRAME(r1)
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/* Put the registers back. */
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lwz r12,VR_VRSAVE(r1)
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cmpdi cr1,r0,0
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cmpdi cr0,r12,0
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bgt cr1,L(do_pltexit)
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la r10,(VR_PARMS+0)(r1)
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la r9,(VR_PARMS+16)(r1)
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/* VRSAVE must be non-zero if VMX is present and VRs are in use. */
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beq L(restoreFXR)
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li r11,32
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li r12,64
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lvx v2,0,r10
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lvx v3,0,r9
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lvx v4,r11,r10
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lvx v5,r11,r9
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addi r11,r11,64
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lvx v6,r12,r10
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lvx v7,r12,r9
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addi r12,r12,64
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lvx v8,r11,r10
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lvx v9,r11,r9
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addi r11,r11,64
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lvx v10,r12,r10
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lvx v11,r12,r9
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lvx v12,r11,r10
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lvx v13,r11,r9
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L(restoreFXR):
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ld r0,FRAME_SIZE+FRAME_LR_SAVE(r1)
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ld r10,INT_PARMS+56(r1)
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ld r9,INT_PARMS+48(r1)
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ld r8,INT_PARMS+40(r1)
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ld r7,INT_PARMS+32(r1)
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mtlr r0
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ld r6,INT_PARMS+24(r1)
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ld r5,INT_PARMS+16(r1)
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ld r4,INT_PARMS+8(r1)
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/* Prepare for calling the function returned by fixup. */
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PPC64_LOAD_FUNCPTR r3
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ld r3,INT_PARMS+0(r1)
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#if _CALL_ELF == 2
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/* Restore the caller's TOC in case we jump to a local entry point. */
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ld r2,FRAME_SIZE+FRAME_TOC_SAVE(r1)
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#endif
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/* Load the floating point registers. */
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lfd fp1,FPR_PARMS+0(r1)
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lfd fp2,FPR_PARMS+8(r1)
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lfd fp3,FPR_PARMS+16(r1)
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lfd fp4,FPR_PARMS+24(r1)
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lfd fp5,FPR_PARMS+32(r1)
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lfd fp6,FPR_PARMS+40(r1)
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lfd fp7,FPR_PARMS+48(r1)
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lfd fp8,FPR_PARMS+56(r1)
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lfd fp9,FPR_PARMS+64(r1)
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lfd fp10,FPR_PARMS+72(r1)
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lfd fp11,FPR_PARMS+80(r1)
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lfd fp12,FPR_PARMS+88(r1)
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lfd fp13,FPR_PARMS+96(r1)
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/* Unwind the stack frame, and jump. */
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ld r31,FRAME_SIZE-8(r1)
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ld r30,FRAME_SIZE-16(r1)
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addi r1,r1,FRAME_SIZE
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bctr
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L(do_pltexit):
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la r10,(VR_PARMS+0)(r1)
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la r9,(VR_PARMS+16)(r1)
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beq L(restoreFXR2)
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li r11,32
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li r12,64
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lvx v2,0,r10
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lvx v3,0,r9
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lvx v4,r11,r10
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lvx v5,r11,r9
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addi r11,r11,64
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lvx v6,r12,r10
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lvx v7,r12,r9
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addi r12,r12,64
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lvx v8,r11,r10
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lvx v9,r11,r9
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addi r11,r11,64
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lvx v10,r12,r10
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lvx v11,r12,r9
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lvx v12,r11,r10
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lvx v13,r11,r9
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L(restoreFXR2):
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ld r0,FRAME_SIZE+FRAME_LR_SAVE(r1)
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ld r10,INT_PARMS+56(r1)
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ld r9,INT_PARMS+48(r1)
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ld r8,INT_PARMS+40(r1)
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ld r7,INT_PARMS+32(r1)
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mtlr r0
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ld r6,INT_PARMS+24(r1)
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ld r5,INT_PARMS+16(r1)
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ld r4,INT_PARMS+8(r1)
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/* Prepare for calling the function returned by fixup. */
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std r2,FRAME_TOC_SAVE(r1)
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PPC64_LOAD_FUNCPTR r3
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ld r3,INT_PARMS+0(r1)
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/* Load the floating point registers. */
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lfd fp1,FPR_PARMS+0(r1)
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lfd fp2,FPR_PARMS+8(r1)
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lfd fp3,FPR_PARMS+16(r1)
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lfd fp4,FPR_PARMS+24(r1)
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lfd fp5,FPR_PARMS+32(r1)
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lfd fp6,FPR_PARMS+40(r1)
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lfd fp7,FPR_PARMS+48(r1)
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lfd fp8,FPR_PARMS+56(r1)
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lfd fp9,FPR_PARMS+64(r1)
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lfd fp10,FPR_PARMS+72(r1)
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lfd fp11,FPR_PARMS+80(r1)
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lfd fp12,FPR_PARMS+88(r1)
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lfd fp13,FPR_PARMS+96(r1)
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/* Call the target function. */
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bctrl
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ld r2,FRAME_TOC_SAVE(r1)
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lwz r12,VR_VRSAVE(r1)
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|
/* But return here and store the return values. */
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std r3,INT_RTN(r1)
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std r4,INT_RTN+8(r1)
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stfd fp1,FPR_RTN+0(r1)
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stfd fp2,FPR_RTN+8(r1)
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cmpdi cr0,r12,0
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la r10,VR_RTN(r1)
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stfd fp3,FPR_RTN+16(r1)
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stfd fp4,FPR_RTN+24(r1)
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#if _CALL_ELF == 2
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la r12,VR_RTN+16(r1)
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stfd fp5,FPR_RTN+32(r1)
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stfd fp6,FPR_RTN+40(r1)
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li r5,32
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li r6,64
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stfd fp7,FPR_RTN+48(r1)
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stfd fp8,FPR_RTN+56(r1)
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stfd fp9,FPR_RTN+64(r1)
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stfd fp10,FPR_RTN+72(r1)
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#endif
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mr r3,r31
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mr r4,r30
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beq L(callpltexit)
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stvx v2,0,r10
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#if _CALL_ELF == 2
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stvx v3,0,r12
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stvx v4,r5,r10
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stvx v5,r5,r12
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addi r5,r5,64
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stvx v6,r6,r10
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stvx v7,r6,r12
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stvx v8,r5,r10
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stvx v9,r5,r12
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#endif
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L(callpltexit):
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addi r5,r1,INT_PARMS
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addi r6,r1,INT_RTN
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bl JUMPTARGET(_dl_call_pltexit)
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#ifndef SHARED
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nop
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#endif
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/* Restore the return values from target function. */
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lwz r12,VR_VRSAVE(r1)
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ld r3,INT_RTN(r1)
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ld r4,INT_RTN+8(r1)
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lfd fp1,FPR_RTN+0(r1)
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lfd fp2,FPR_RTN+8(r1)
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cmpdi cr0,r12,0
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la r11,VR_RTN(r1)
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lfd fp3,FPR_RTN+16(r1)
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lfd fp4,FPR_RTN+24(r1)
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#if _CALL_ELF == 2
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la r12,VR_RTN+16(r1)
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lfd fp5,FPR_RTN+32(r1)
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lfd fp6,FPR_RTN+40(r1)
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li r30,32
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li r31,64
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lfd fp7,FPR_RTN+48(r1)
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lfd fp8,FPR_RTN+56(r1)
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lfd fp9,FPR_RTN+64(r1)
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lfd fp10,FPR_RTN+72(r1)
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#endif
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beq L(pltexitreturn)
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lvx v2,0,r11
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#if _CALL_ELF == 2
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lvx v3,0,r12
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lvx v4,r30,r11
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lvx v5,r30,r12
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addi r30,r30,64
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lvx v6,r31,r11
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lvx v7,r31,r12
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lvx v8,r30,r11
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lvx v9,r30,r12
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#endif
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L(pltexitreturn):
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ld r0,FRAME_SIZE+FRAME_LR_SAVE(r1)
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ld r31,FRAME_SIZE-8(r1)
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ld r30,FRAME_SIZE-16(r1)
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mtlr r0
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ld r1,0(r1)
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blr
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END(_dl_profile_resolve)
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#endif
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