glibc/sysdeps/aarch64/multiarch/Makefile
Andrew Pinski 2f1f7a5f8a
Aarch64: Add new memset for Qualcomm's oryon-1 core
Qualcom's new core, oryon-1, has a different characteristics for
memset than the current versions of memset. For non-zero, larger
sizes, using GPRs rather than the SIMD stores is ~30% faster.
For even larger sizes, using the nontemporal stores is needed
not to polute the L1/L2 caches.

For zero values, using `dc zva` should be used. Since we
know the size will always be 64 bytes, we don't need to figure
out the size there.

I started with the emag memset and added back the `dc zva` code.

Changes since v1:
* v3: Fix comment formating

Signed-off-by: Andrew Pinski <quic_apinski@quicinc.com>
Reviewed-by: Adhemerval Zanella  <adhemerval.zanella@linaro.org>
2024-06-30 13:47:17 +02:00

24 lines
407 B
Makefile

ifeq ($(subdir),string)
sysdep_routines += \
memchr_generic \
memchr_nosimd \
memcpy_a64fx \
memcpy_generic \
memcpy_mops \
memcpy_oryon1 \
memcpy_sve \
memcpy_thunderx \
memcpy_thunderx2 \
memmove_mops \
memset_a64fx \
memset_emag \
memset_generic \
memset_kunpeng \
memset_mops \
memset_oryon1 \
memset_zva64 \
strlen_asimd \
strlen_generic \
# sysdep_routines
endif