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I used these shell commands: ../glibc/scripts/update-copyrights $PWD/../gnulib/build-aux/update-copyright (cd ../glibc && git commit -am"[this commit message]") and then ignored the output, which consisted lines saying "FOO: warning: copyright statement not found" for each of 6694 files FOO. I then removed trailing white space from benchtests/bench-pthread-locks.c and iconvdata/tst-iconv-big5-hkscs-to-2ucs4.c, to work around this diagnostic from Savannah: remote: *** pre-commit check failed ... remote: *** error: lines with trailing whitespace found remote: error: hook declined to update refs/heads/master
116 lines
5.4 KiB
C
116 lines
5.4 KiB
C
/* Atomic operations. ARM/Linux version.
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Copyright (C) 2002-2021 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<https://www.gnu.org/licenses/>. */
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#include <stdint.h>
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/* If the compiler doesn't provide a primitive, we'll use this macro
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to get assistance from the kernel. */
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#ifdef __thumb2__
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# define __arm_assisted_full_barrier() \
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__asm__ __volatile__ \
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("movw\tip, #0x0fa0\n\t" \
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"movt\tip, #0xffff\n\t" \
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"blx\tip" \
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: : : "ip", "lr", "cc", "memory");
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#else
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# define __arm_assisted_full_barrier() \
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__asm__ __volatile__ \
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("mov\tip, #0xffff0fff\n\t" \
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"mov\tlr, pc\n\t" \
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"add\tpc, ip, #(0xffff0fa0 - 0xffff0fff)" \
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: : : "ip", "lr", "cc", "memory");
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#endif
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/* Atomic compare and exchange. This sequence relies on the kernel to
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provide a compare and exchange operation which is atomic on the
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current architecture, either via cleverness on pre-ARMv6 or via
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ldrex / strex on ARMv6.
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It doesn't matter what register is used for a_oldval2, but we must
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specify one to work around GCC PR rtl-optimization/21223. Otherwise
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it may cause a_oldval or a_tmp to be moved to a different register.
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We use the union trick rather than simply using __typeof (...) in the
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declarations of A_OLDVAL et al because when NEWVAL or OLDVAL is of the
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form *PTR and PTR has a 'volatile ... *' type, then __typeof (*PTR) has
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a 'volatile ...' type and this triggers -Wvolatile-register-var to
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complain about 'register volatile ... asm ("reg")'.
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We use the same union trick in the declaration of A_PTR because when
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MEM is of the from *PTR and PTR has a 'const ... *' type, then __typeof
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(*PTR) has a 'const ...' type and this enables the compiler to substitute
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the variable with its initializer in asm statements, which may cause the
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corresponding operand to appear in a different register. */
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#ifdef __thumb2__
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/* Thumb-2 has ldrex/strex. However it does not have barrier instructions,
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so we still need to use the kernel helper. */
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# define __arm_assisted_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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({ union { __typeof (mem) a; uint32_t v; } mem_arg = { .a = (mem) }; \
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union { __typeof (oldval) a; uint32_t v; } oldval_arg = { .a = (oldval) };\
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union { __typeof (newval) a; uint32_t v; } newval_arg = { .a = (newval) };\
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register uint32_t a_oldval asm ("r0"); \
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register uint32_t a_newval asm ("r1") = newval_arg.v; \
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register uint32_t a_ptr asm ("r2") = mem_arg.v; \
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register uint32_t a_tmp asm ("r3"); \
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register uint32_t a_oldval2 asm ("r4") = oldval_arg.v; \
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__asm__ __volatile__ \
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("0:\tldr\t%[tmp],[%[ptr]]\n\t" \
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"cmp\t%[tmp], %[old2]\n\t" \
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"bne\t1f\n\t" \
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"mov\t%[old], %[old2]\n\t" \
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"movw\t%[tmp], #0x0fc0\n\t" \
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"movt\t%[tmp], #0xffff\n\t" \
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"blx\t%[tmp]\n\t" \
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"bcc\t0b\n\t" \
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"mov\t%[tmp], %[old2]\n\t" \
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"1:" \
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: [old] "=&r" (a_oldval), [tmp] "=&r" (a_tmp) \
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: [new] "r" (a_newval), [ptr] "r" (a_ptr), \
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[old2] "r" (a_oldval2) \
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: "ip", "lr", "cc", "memory"); \
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(__typeof (oldval)) a_tmp; })
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#else
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# define __arm_assisted_compare_and_exchange_val_32_acq(mem, newval, oldval) \
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({ union { __typeof (mem) a; uint32_t v; } mem_arg = { .a = (mem) }; \
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union { __typeof (oldval) a; uint32_t v; } oldval_arg = { .a = (oldval) };\
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union { __typeof (newval) a; uint32_t v; } newval_arg = { .a = (newval) };\
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register uint32_t a_oldval asm ("r0"); \
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register uint32_t a_newval asm ("r1") = newval_arg.v; \
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register uint32_t a_ptr asm ("r2") = mem_arg.v; \
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register uint32_t a_tmp asm ("r3"); \
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register uint32_t a_oldval2 asm ("r4") = oldval_arg.v; \
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__asm__ __volatile__ \
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("0:\tldr\t%[tmp],[%[ptr]]\n\t" \
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"cmp\t%[tmp], %[old2]\n\t" \
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"bne\t1f\n\t" \
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"mov\t%[old], %[old2]\n\t" \
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"mov\t%[tmp], #0xffff0fff\n\t" \
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"mov\tlr, pc\n\t" \
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"add\tpc, %[tmp], #(0xffff0fc0 - 0xffff0fff)\n\t" \
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"bcc\t0b\n\t" \
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"mov\t%[tmp], %[old2]\n\t" \
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"1:" \
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: [old] "=&r" (a_oldval), [tmp] "=&r" (a_tmp) \
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: [new] "r" (a_newval), [ptr] "r" (a_ptr), \
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[old2] "r" (a_oldval2) \
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: "ip", "lr", "cc", "memory"); \
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(__typeof (oldval)) a_tmp; })
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#endif
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#include <sysdeps/arm/atomic-machine.h>
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