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Continuing the preparation for additional _FloatN / _FloatNx aliases, this patch makes long double functions in sysdeps/ia64/fpu use libm_alias_ldouble macros, so that they can have _Float64x aliases added in future. Most ia64 libm functions are defined using ia64-specific macros in libm-symbols.h. These are left unchanged, with libm-alias-ldouble.h included from libm-symbols.h (and the expectation that other libm-alias-*.h headers will be included from there as well in future), and libm_alias_ldouble_other then being used in most cases to define aliases for any additional types (currently the empty set). Functions that used weak_alias are converted to use libm_alias_ldouble. Tested (compilation only) with build-many-glibcs.py for ia64, including that installed stripped shared libraries are unchanged by the patch. * sysdeps/ia64/fpu/libm-symbols.h: Include <libm-alias-ldouble.h>. * sysdeps/ia64/fpu/e_acoshl.S (acoshl): Use libm_alias_ldouble_other. * sysdeps/ia64/fpu/e_acosl.S (acosl): Likewise. * sysdeps/ia64/fpu/e_asinl.S (asinl): Likewise. * sysdeps/ia64/fpu/e_atanhl.S (atanhl): Likewise. * sysdeps/ia64/fpu/e_coshl.S (coshl): Likewise. * sysdeps/ia64/fpu/e_exp10l.S (exp10l): Likewise. * sysdeps/ia64/fpu/e_exp2l.S (exp2l): Likewise. * sysdeps/ia64/fpu/e_fmodl.S (fmodl): Likewise. * sysdeps/ia64/fpu/e_hypotl.S (hypotl): Likewise. * sysdeps/ia64/fpu/e_lgammal_r.c (lgammal_r): Define using libm_alias_ldouble_r. * sysdeps/ia64/fpu/e_log2l.S (log2l): Use libm_alias_ldouble_other. * sysdeps/ia64/fpu/e_logl.S (logl): Likewise. (log10l): Likewise. * sysdeps/ia64/fpu/e_powl.S (powl): Likewise. * sysdeps/ia64/fpu/e_remainderl.S (remainderl): Likewise. * sysdeps/ia64/fpu/e_sinhl.S (sinhl): Likewise. * sysdeps/ia64/fpu/e_sqrtl.S (sqrtl): Likewise. * sysdeps/ia64/fpu/libm_sincosl.S (sincosl): Likewise. * sysdeps/ia64/fpu/s_asinhl.S (asinhl): Likewise. * sysdeps/ia64/fpu/s_atanl.S (atanl): Likewise. (atan2l): Likewise. * sysdeps/ia64/fpu/s_cbrtl.S (cbrtl): Likewise. * sysdeps/ia64/fpu/s_ceill.S (ceill): Likewise. * sysdeps/ia64/fpu/s_copysign.S (copysignl): Define using libm_alias_ldouble. * sysdeps/ia64/fpu/s_cosl.S (sinl): Use libm_alias_ldouble_other. (cosl): Likewise. * sysdeps/ia64/fpu/s_erfcl.S (erfcl): Likewise. * sysdeps/ia64/fpu/s_erfl.S (erfl): Likewise. * sysdeps/ia64/fpu/s_expm1l.S (expm1l): Likewise. (expl): Likewise. * sysdeps/ia64/fpu/s_fabsl.S (fabsl): Likewise. * sysdeps/ia64/fpu/s_fdiml.S (fdiml): Likewise. * sysdeps/ia64/fpu/s_floorl.S (floorl): Likewise. * sysdeps/ia64/fpu/s_fmal.S (fmal): Likewise. * sysdeps/ia64/fpu/s_fmaxl.S (fmaxl): Likewise. * sysdeps/ia64/fpu/s_frexpl.c (frexpl): Likewise. * sysdeps/ia64/fpu/s_ldexpl.c (ldexpl): Likewise. * sysdeps/ia64/fpu/s_log1pl.S (log1pl): Likewise. * sysdeps/ia64/fpu/s_logbl.S (logbl): Likewise. * sysdeps/ia64/fpu/s_modfl.S (modfl): Likewise. * sysdeps/ia64/fpu/s_nearbyintl.S (nearbyintl): Define using libm_alias_ldouble. * sysdeps/ia64/fpu/s_nextafterl.S (nextafterl): Use libm_alias_ldouble_other. * sysdeps/ia64/fpu/s_rintl.S (rintl): Likewise. * sysdeps/ia64/fpu/s_roundl.S (roundl): Likewise. * sysdeps/ia64/fpu/s_scalbnl.c (scalbnl): Define using libm_alias_ldouble. * sysdeps/ia64/fpu/s_tanhl.S (tanhl): Use libm_alias_ldouble_other. * sysdeps/ia64/fpu/s_tanl.S (tanl): Likewise. * sysdeps/ia64/fpu/s_truncl.S (truncl): Likewise. * sysdeps/ia64/fpu/w_lgammal_main.c [BUILD_LGAMMA && !USE_AS_COMPAT] (lgammal): Likewise. * sysdeps/ia64/fpu/w_tgammal_compat.S (tgammal): Likewise.
217 lines
6.5 KiB
ArmAsm
217 lines
6.5 KiB
ArmAsm
.file "floorl.s"
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// Copyright (c) 2000 - 2003, Intel Corporation
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// All rights reserved.
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//
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// Contributed 2000 by the Intel Numerics Group, Intel Corporation
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//
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// Redistribution and use in source and binary forms, with or without
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// modification, are permitted provided that the following conditions are
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// met:
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//
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// * Redistributions of source code must retain the above copyright
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// notice, this list of conditions and the following disclaimer.
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//
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// * Redistributions in binary form must reproduce the above copyright
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// notice, this list of conditions and the following disclaimer in the
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// documentation and/or other materials provided with the distribution.
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//
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// * The name of Intel Corporation may not be used to endorse or promote
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// products derived from this software without specific prior written
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// permission.
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// THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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// "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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// LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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// A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL INTEL OR ITS
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// CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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// EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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// PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
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// PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY
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// OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY OR TORT (INCLUDING
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// NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
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// SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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//
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// Intel Corporation is the author of this code, and requests that all
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// problem reports or change requests be submitted to it directly at
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// http://www.intel.com/software/products/opensource/libraries/num.htm.
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//
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// History
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//==============================================================
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// 02/02/00 Initial version
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// 06/13/00 Improved speed
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// 06/27/00 Eliminated incorrect invalid flag setting
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// 02/07/01 Corrected sign of zero result in round to -inf mode
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// 05/20/02 Cleaned up namespace and sf0 syntax
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// 01/28/03 Improved performance
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//==============================================================
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// API
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//==============================================================
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// long double floorl(long double x)
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//==============================================================
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// general input registers:
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// r14 - r18
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rSignexp = r14
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rExp = r15
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rExpMask = r16
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rBigexp = r17
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rM1 = r18
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// floating-point registers:
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// f8 - f13
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fXInt = f9
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fNormX = f10
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fTmp = f11
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fAdj = f12
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fPreResult = f13
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// predicate registers used:
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// p6 - p9
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// Overview of operation
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//==============================================================
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// long double floorl(long double x)
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// Return an integer value (represented as a long double) that is the largest
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// value not greater than x
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// This is x rounded toward -infinity to an integral value.
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// Inexact is set if x != floorl(x)
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//==============================================================
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// double_extended
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// if the exponent is > 1003e => 3F(true) = 63(decimal)
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// we have a significand of 64 bits 1.63-bits.
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// If we multiply by 2^63, we no longer have a fractional part
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// So input is an integer value already.
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// double
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// if the exponent is >= 10033 => 34(true) = 52(decimal)
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// 34 + 3ff = 433
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// we have a significand of 53 bits 1.52-bits. (implicit 1)
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// If we multiply by 2^52, we no longer have a fractional part
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// So input is an integer value already.
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// single
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// if the exponent is > 10016 => 17(true) = 23(decimal)
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// we have a significand of 24 bits 1.23-bits. (implicit 1)
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// If we multiply by 2^23, we no longer have a fractional part
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// So input is an integer value already.
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.section .text
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GLOBAL_IEEE754_ENTRY(floorl)
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{ .mfi
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getf.exp rSignexp = f8 // Get signexp, recompute if unorm
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fclass.m p7,p0 = f8, 0x0b // Test x unorm
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addl rBigexp = 0x1003e, r0 // Set exponent at which is integer
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}
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{ .mfi
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mov rM1 = -1 // Set all ones
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fcvt.fx.trunc.s1 fXInt = f8 // Convert to int in significand
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mov rExpMask = 0x1FFFF // Form exponent mask
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}
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;;
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{ .mfi
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nop.m 0
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fcmp.lt.s1 p8,p9 = f8, f0 // Test x < 0
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nop.i 0
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}
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{ .mfb
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setf.sig fTmp = rM1 // Make const for setting inexact
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fnorm.s1 fNormX = f8 // Normalize input
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(p7) br.cond.spnt FLOOR_UNORM // Branch if x unorm
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}
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;;
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FLOOR_COMMON:
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// Return here from FLOOR_UNORM
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{ .mfi
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nop.m 0
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fclass.m p6,p0 = f8, 0x1e7 // Test x natval, nan, inf, 0
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nop.i 0
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}
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;;
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.pred.rel "mutex",p8,p9
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{ .mfi
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nop.m 0
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(p8) fnma.s1 fAdj = f1, f1, f0 // If x < 0, adjustment is -1
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nop.i 0
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}
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{ .mfi
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nop.m 0
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(p9) fma.s1 fAdj = f0, f0, f0 // If x > 0, adjustment is 0
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nop.i 0
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}
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;;
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{ .mfi
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nop.m 0
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fcvt.xf fPreResult = fXInt // trunc(x)
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nop.i 0
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}
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{ .mfb
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nop.m 0
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(p6) fma.s0 f8 = f8, f1, f0 // Result if x natval, nan, inf, 0
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(p6) br.ret.spnt b0 // Exit if x natval, nan, inf, 0
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}
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;;
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{ .mmi
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and rExp = rSignexp, rExpMask // Get biased exponent
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;;
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cmp.ge p7,p6 = rExp, rBigexp // Is |x| >= 2^63?
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nop.i 0
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}
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;;
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{ .mfi
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nop.m 0
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(p6) fma.s0 f8 = fPreResult, f1, fAdj // Result if !int, |x| < 2^63
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nop.i 0
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}
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{ .mfi
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nop.m 0
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(p7) fma.s0 f8 = fNormX, f1, f0 // Result, if |x| >= 2^63
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nop.i 0
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}
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;;
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{ .mfi
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nop.m 0
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(p6) fcmp.eq.unc.s1 p8, p9 = fPreResult, fNormX // Is trunc(x) = x ?
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nop.i 0
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}
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;;
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{ .mfi
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nop.m 0
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(p9) fmpy.s0 fTmp = fTmp, fTmp // Dummy to set inexact
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nop.i 0
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}
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{ .mfb
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nop.m 0
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(p8) fma.s0 f8 = fNormX, f1, f0 // If x int, result normalized x
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br.ret.sptk b0 // Exit main path, 0 < |x| < 2^63
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}
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;;
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FLOOR_UNORM:
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// Here if x unorm
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{ .mfb
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getf.exp rSignexp = fNormX // Get signexp, recompute if unorm
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fcmp.eq.s0 p7,p0 = f8, f0 // Dummy op to set denormal flag
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br.cond.sptk FLOOR_COMMON // Return to main path
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}
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;;
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GLOBAL_IEEE754_END(floorl)
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libm_alias_ldouble_other (__floor, floor)
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