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301a6724af
* math/tgmath.h (__TGMATH_UNARY_IMAG_ONLY): Removed. 2003-06-15 Andreas Jaeger <aj@suse.de> * sysdeps/i386/fpu/feenablxcpt.c (feenableexcept): Correct setting of MXCSR. * sysdeps/i386/fpu/fedisblxcpt.c (fedisableexcept): Likewise. * sysdeps/i386/fpu/feholdexcpt.c (feholdexcept): Likewise. Reported by Arnaud Desitter <arnaud.desitter@geography.oxford.ac.uk>. * math/tgmath.h (carg): Handle real arguments. (conj): Likewise. (cproj): Likewise. (cimag): Likewise. (creal): Likewise. * math/Makefile (CFLAGS-test-tgmath-ret.c): New. (tests): Add test-tgmath-ret. * math/test-tgmath-ret.c: New file. * math/tgmath.h (ilogb): Return always an int. 2003-06-16 Ulrich Drepper <drepper@redhat.com> computation so that prelinking works.
56 lines
1.6 KiB
C
56 lines
1.6 KiB
C
/* Disable floating-point exceptions.
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Copyright (C) 1999, 2000, 2003 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by Andreas Jaeger <aj@suse.de>, 1999.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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#include <fenv.h>
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#include <unistd.h>
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#include <ldsodefs.h>
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#include <dl-procinfo.h>
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int
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fedisableexcept (int excepts)
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{
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unsigned short int new_exc, old_exc;
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/* Get the current control word. */
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__asm__ ("fstcw %0" : "=m" (*&new_exc));
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old_exc = (~new_exc) & FE_ALL_EXCEPT;
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excepts &= FE_ALL_EXCEPT;
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new_exc |= excepts;
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__asm__ ("fldcw %0" : : "m" (*&new_exc));
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/* If the CPU supports SSE we set the MXCSR as well. */
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if ((GL(dl_hwcap_mask) & HWCAP_I386_XMM) != 0)
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{
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unsigned int xnew_exc;
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/* Get the current control word. */
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__asm__ ("stmxcsr %0" : "=m" (*&xnew_exc));
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xnew_exc |= excepts << 7;
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__asm__ ("ldmxcsr %0" : : "m" (*&xnew_exc));
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}
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return old_exc;
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}
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