glibc/sysdeps/powerpc/powerpc64/power8/fpu/s_isnanf.S
Adhemerval Zanella 487972aea5 PowerPC: Optimized isnan/isnanf for POWER8
This patch add a optimized isnan/isnanf implementation for POWER8
using the new Move From VSR Doubleword instruction to gains some
cycles from FP to GRP register move.
2014-02-27 12:58:32 -06:00

2 lines
54 B
ArmAsm

/* This function uses the same code as s_isnan.S. */