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581c785bf3
I used these shell commands: ../glibc/scripts/update-copyrights $PWD/../gnulib/build-aux/update-copyright (cd ../glibc && git commit -am"[this commit message]") and then ignored the output, which consisted lines saying "FOO: warning: copyright statement not found" for each of 7061 files FOO. I then removed trailing white space from math/tgmath.h, support/tst-support-open-dev-null-range.c, and sysdeps/x86_64/multiarch/strlen-vec.S, to work around the following obscure pre-commit check failure diagnostics from Savannah. I don't know why I run into these diagnostics whereas others evidently do not. remote: *** 912-#endif remote: *** 913: remote: *** 914- remote: *** error: lines with trailing whitespace found ... remote: *** error: sysdeps/unix/sysv/linux/statx_cp.c: trailing lines
430 lines
7.7 KiB
ArmAsm
430 lines
7.7 KiB
ArmAsm
/* Optimized memcpy implementation for PowerPC64/POWER7.
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Copyright (C) 2010-2022 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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/* void * [r3] memcpy (void *dst [r3], void *src [r4], size_t len [r5]);
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Returns 'dst'. */
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#ifndef MEMCPY
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# define MEMCPY memcpy
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#endif
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#define dst 11 /* Use r11 so r3 kept unchanged. */
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#define src 4
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#define cnt 5
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.machine power7
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ENTRY_TOCLESS (MEMCPY, 5)
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CALL_MCOUNT 3
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cmpldi cr1,cnt,31
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neg 0,3
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ble cr1, L(copy_LT_32) /* If move < 32 bytes use short move
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code. */
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/* Align copies using VSX instructions to quadword. It is to avoid alignment
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traps when memcpy is used on non-cacheable memory (for instance, memory
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mapped I/O). */
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andi. 10,3,15
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clrldi 11,4,60
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cmpld cr6,10,11 /* SRC and DST alignments match? */
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mr dst,3
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bne cr6,L(copy_GE_32_unaligned)
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beq L(aligned_copy)
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mtocrf 0x01,0
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clrldi 0,0,60
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/* Get the DST and SRC aligned to 16 bytes. */
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1:
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bf 31,2f
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lbz 6,0(src)
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addi src,src,1
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stb 6,0(dst)
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addi dst,dst,1
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2:
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bf 30,4f
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lhz 6,0(src)
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addi src,src,2
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sth 6,0(dst)
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addi dst,dst,2
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4:
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bf 29,8f
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lwz 6,0(src)
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addi src,src,4
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stw 6,0(dst)
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addi dst,dst,4
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8:
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bf 28,16f
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ld 6,0(src)
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addi src,src,8
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std 6,0(dst)
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addi dst,dst,8
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16:
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subf cnt,0,cnt
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/* Main aligned copy loop. Copies 128 bytes at a time. */
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L(aligned_copy):
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li 6,16
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li 7,32
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li 8,48
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mtocrf 0x02,cnt
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srdi 12,cnt,7
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cmpdi 12,0
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beq L(aligned_tail)
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lvx 6,0,src
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lvx 7,src,6
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mtctr 12
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b L(aligned_128loop)
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.align 4
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L(aligned_128head):
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/* for the 2nd + iteration of this loop. */
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lvx 6,0,src
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lvx 7,src,6
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L(aligned_128loop):
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lvx 8,src,7
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lvx 9,src,8
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stvx 6,0,dst
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addi src,src,64
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stvx 7,dst,6
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stvx 8,dst,7
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stvx 9,dst,8
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lvx 6,0,src
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lvx 7,src,6
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addi dst,dst,64
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lvx 8,src,7
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lvx 9,src,8
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addi src,src,64
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stvx 6,0,dst
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stvx 7,dst,6
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stvx 8,dst,7
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stvx 9,dst,8
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addi dst,dst,64
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bdnz L(aligned_128head)
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L(aligned_tail):
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mtocrf 0x01,cnt
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bf 25,32f
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lvx 6,0,src
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lvx 7,src,6
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lvx 8,src,7
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lvx 9,src,8
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addi src,src,64
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stvx 6,0,dst
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stvx 7,dst,6
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stvx 8,dst,7
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stvx 9,dst,8
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addi dst,dst,64
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32:
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bf 26,16f
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lvx 6,0,src
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lvx 7,src,6
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addi src,src,32
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stvx 6,0,dst
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stvx 7,dst,6
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addi dst,dst,32
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16:
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bf 27,8f
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lvx 6,0,src
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addi src,src,16
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stvx 6,0,dst
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addi dst,dst,16
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8:
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bf 28,4f
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ld 6,0(src)
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addi src,src,8
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std 6,0(dst)
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addi dst,dst,8
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4: /* Copies 4~7 bytes. */
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bf 29,L(tail2)
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lwz 6,0(src)
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stw 6,0(dst)
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bf 30,L(tail5)
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lhz 7,4(src)
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sth 7,4(dst)
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bflr 31
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lbz 8,6(src)
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stb 8,6(dst)
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/* Return original DST pointer. */
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blr
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/* Handle copies of 0~31 bytes. */
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.align 4
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L(copy_LT_32):
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mr dst,3
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cmpldi cr6,cnt,8
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mtocrf 0x01,cnt
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ble cr6,L(copy_LE_8)
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/* At least 9 bytes to go. */
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neg 8,4
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andi. 0,8,3
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cmpldi cr1,cnt,16
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beq L(copy_LT_32_aligned)
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/* Force 4-byte alignment for SRC. */
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mtocrf 0x01,0
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subf cnt,0,cnt
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2:
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bf 30,1f
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lhz 6,0(src)
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addi src,src,2
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sth 6,0(dst)
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addi dst,dst,2
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1:
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bf 31,L(end_4bytes_alignment)
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lbz 6,0(src)
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addi src,src,1
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stb 6,0(dst)
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addi dst,dst,1
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.align 4
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L(end_4bytes_alignment):
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cmpldi cr1,cnt,16
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mtocrf 0x01,cnt
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L(copy_LT_32_aligned):
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/* At least 6 bytes to go, and SRC is word-aligned. */
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blt cr1,8f
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/* Copy 16 bytes. */
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lwz 6,0(src)
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lwz 7,4(src)
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stw 6,0(dst)
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lwz 8,8(src)
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stw 7,4(dst)
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lwz 6,12(src)
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addi src,src,16
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stw 8,8(dst)
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stw 6,12(dst)
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addi dst,dst,16
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8: /* Copy 8 bytes. */
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bf 28,L(tail4)
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lwz 6,0(src)
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lwz 7,4(src)
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addi src,src,8
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stw 6,0(dst)
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stw 7,4(dst)
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addi dst,dst,8
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.align 4
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/* Copies 4~7 bytes. */
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L(tail4):
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bf 29,L(tail2)
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lwz 6,0(src)
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stw 6,0(dst)
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bf 30,L(tail5)
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lhz 7,4(src)
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sth 7,4(dst)
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bflr 31
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lbz 8,6(src)
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stb 8,6(dst)
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/* Return original DST pointer. */
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blr
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.align 4
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/* Copies 2~3 bytes. */
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L(tail2):
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bf 30,1f
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lhz 6,0(src)
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sth 6,0(dst)
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bflr 31
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lbz 7,2(src)
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stb 7,2(dst)
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blr
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.align 4
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L(tail5):
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bflr 31
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lbz 6,4(src)
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stb 6,4(dst)
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blr
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.align 4
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1:
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bflr 31
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lbz 6,0(src)
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stb 6,0(dst)
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/* Return original DST pointer. */
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blr
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/* Handles copies of 0~8 bytes. */
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.align 4
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L(copy_LE_8):
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bne cr6,L(tail4)
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/* Though we could've used ld/std here, they are still
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slow for unaligned cases. */
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lwz 6,0(src)
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lwz 7,4(src)
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stw 6,0(dst)
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stw 7,4(dst)
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blr
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/* Handle copies of 32+ bytes where DST is aligned (to quadword) but
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SRC is not. Use aligned quadword loads from SRC, shifted to realign
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the data, allowing for aligned DST stores. */
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.align 4
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L(copy_GE_32_unaligned):
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clrldi 0,0,60 /* Number of bytes until the 1st dst quadword. */
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srdi 9,cnt,4 /* Number of full quadwords remaining. */
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beq L(copy_GE_32_unaligned_cont)
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/* DST is not quadword aligned, get it aligned. */
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mtocrf 0x01,0
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subf cnt,0,cnt
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/* Vector instructions work best when proper alignment (16-bytes)
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is present. Move 0~15 bytes as needed to get DST quadword-aligned. */
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1:
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bf 31,2f
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lbz 6,0(src)
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addi src,src,1
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stb 6,0(dst)
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addi dst,dst,1
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2:
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bf 30,4f
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lhz 6,0(src)
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addi src,src,2
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sth 6,0(dst)
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addi dst,dst,2
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4:
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bf 29,8f
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lwz 6,0(src)
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addi src,src,4
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stw 6,0(dst)
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addi dst,dst,4
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8:
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bf 28,0f
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ld 6,0(src)
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addi src,src,8
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std 6,0(dst)
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addi dst,dst,8
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0:
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srdi 9,cnt,4 /* Number of full quadwords remaining. */
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/* The proper alignment is present, it is OK to copy the bytes now. */
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L(copy_GE_32_unaligned_cont):
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/* Setup two indexes to speed up the indexed vector operations. */
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clrldi 10,cnt,60
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li 6,16 /* Index for 16-bytes offsets. */
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li 7,32 /* Index for 32-bytes offsets. */
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cmpldi cr1,10,0
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srdi 8,cnt,5 /* Setup the loop counter. */
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mtocrf 0x01,9
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cmpldi cr6,9,1
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#ifdef __LITTLE_ENDIAN__
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lvsr 5,0,src
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#else
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lvsl 5,0,src
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#endif
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lvx 3,0,src
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li 0,0
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bf 31,L(setup_unaligned_loop)
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/* Copy another 16 bytes to align to 32-bytes due to the loop. */
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lvx 4,src,6
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#ifdef __LITTLE_ENDIAN__
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vperm 6,4,3,5
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#else
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vperm 6,3,4,5
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#endif
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addi src,src,16
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stvx 6,0,dst
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addi dst,dst,16
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vor 3,4,4
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clrrdi 0,src,60
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L(setup_unaligned_loop):
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mtctr 8
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ble cr6,L(end_unaligned_loop)
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/* Copy 32 bytes at a time using vector instructions. */
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.align 4
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L(unaligned_loop):
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/* Note: vr6/vr10 may contain data that was already copied,
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but in order to get proper alignment, we may have to copy
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some portions again. This is faster than having unaligned
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vector instructions though. */
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lvx 4,src,6
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#ifdef __LITTLE_ENDIAN__
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vperm 6,4,3,5
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#else
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vperm 6,3,4,5
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#endif
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lvx 3,src,7
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#ifdef __LITTLE_ENDIAN__
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vperm 10,3,4,5
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#else
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vperm 10,4,3,5
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#endif
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addi src,src,32
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stvx 6,0,dst
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stvx 10,dst,6
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addi dst,dst,32
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bdnz L(unaligned_loop)
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clrrdi 0,src,60
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.align 4
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L(end_unaligned_loop):
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/* Check for tail bytes. */
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mtocrf 0x01,cnt
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beqlr cr1
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add src,src,0
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/* We have 1~15 tail bytes to copy, and DST is quadword aligned. */
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/* Copy 8 bytes. */
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bf 28,4f
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lwz 6,0(src)
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lwz 7,4(src)
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addi src,src,8
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stw 6,0(dst)
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stw 7,4(dst)
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addi dst,dst,8
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4: /* Copy 4~7 bytes. */
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bf 29,L(tail2)
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lwz 6,0(src)
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stw 6,0(dst)
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bf 30,L(tail5)
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lhz 7,4(src)
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sth 7,4(dst)
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bflr 31
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lbz 8,6(src)
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stb 8,6(dst)
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/* Return original DST pointer. */
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blr
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END_GEN_TB (MEMCPY,TB_TOCLESS)
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libc_hidden_builtin_def (memcpy)
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