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9fd3409842
Cleanup ifuncs. Remove uses of libc_hidden_builtin_def, use ENTRY rather than ENTRY_ALIGN, remove unnecessary defines and conditional compilation. Rename strlen_mte to strlen_generic. Remove rtld-memset. Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
308 lines
7.0 KiB
ArmAsm
308 lines
7.0 KiB
ArmAsm
/* Optimized memcpy for Fujitsu A64FX processor.
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Copyright (C) 2021-2023 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library. If not, see
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<https://www.gnu.org/licenses/>. */
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#include <sysdep.h>
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#undef BTI_C
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#define BTI_C
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/* Assumptions:
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*
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* ARMv8.2-a, AArch64, unaligned accesses, sve
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*
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*/
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#define dstin x0
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#define src x1
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#define n x2
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#define dst x3
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#define dstend x4
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#define srcend x5
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#define tmp x6
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#define vlen x7
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#define vlen8 x8
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#if HAVE_AARCH64_SVE_ASM
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.arch armv8.2-a+sve
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.macro ld1b_unroll8
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ld1b z0.b, p0/z, [src, 0, mul vl]
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ld1b z1.b, p0/z, [src, 1, mul vl]
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ld1b z2.b, p0/z, [src, 2, mul vl]
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ld1b z3.b, p0/z, [src, 3, mul vl]
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ld1b z4.b, p0/z, [src, 4, mul vl]
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ld1b z5.b, p0/z, [src, 5, mul vl]
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ld1b z6.b, p0/z, [src, 6, mul vl]
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ld1b z7.b, p0/z, [src, 7, mul vl]
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.endm
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.macro stld1b_unroll4a
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st1b z0.b, p0, [dst, 0, mul vl]
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st1b z1.b, p0, [dst, 1, mul vl]
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ld1b z0.b, p0/z, [src, 0, mul vl]
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ld1b z1.b, p0/z, [src, 1, mul vl]
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st1b z2.b, p0, [dst, 2, mul vl]
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st1b z3.b, p0, [dst, 3, mul vl]
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ld1b z2.b, p0/z, [src, 2, mul vl]
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ld1b z3.b, p0/z, [src, 3, mul vl]
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.endm
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.macro stld1b_unroll4b
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st1b z4.b, p0, [dst, 4, mul vl]
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st1b z5.b, p0, [dst, 5, mul vl]
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ld1b z4.b, p0/z, [src, 4, mul vl]
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ld1b z5.b, p0/z, [src, 5, mul vl]
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st1b z6.b, p0, [dst, 6, mul vl]
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st1b z7.b, p0, [dst, 7, mul vl]
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ld1b z6.b, p0/z, [src, 6, mul vl]
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ld1b z7.b, p0/z, [src, 7, mul vl]
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.endm
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.macro stld1b_unroll8
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stld1b_unroll4a
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stld1b_unroll4b
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.endm
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.macro st1b_unroll8
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st1b z0.b, p0, [dst, 0, mul vl]
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st1b z1.b, p0, [dst, 1, mul vl]
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st1b z2.b, p0, [dst, 2, mul vl]
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st1b z3.b, p0, [dst, 3, mul vl]
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st1b z4.b, p0, [dst, 4, mul vl]
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st1b z5.b, p0, [dst, 5, mul vl]
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st1b z6.b, p0, [dst, 6, mul vl]
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st1b z7.b, p0, [dst, 7, mul vl]
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.endm
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#undef BTI_C
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#define BTI_C
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ENTRY (__memcpy_a64fx)
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PTR_ARG (0)
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PTR_ARG (1)
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SIZE_ARG (2)
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cntb vlen
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cmp n, vlen, lsl 1
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b.hi L(copy_small)
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whilelo p1.b, vlen, n
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whilelo p0.b, xzr, n
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ld1b z0.b, p0/z, [src, 0, mul vl]
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ld1b z1.b, p1/z, [src, 1, mul vl]
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st1b z0.b, p0, [dstin, 0, mul vl]
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st1b z1.b, p1, [dstin, 1, mul vl]
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ret
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.p2align 4
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L(copy_small):
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cmp n, vlen, lsl 3
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b.hi L(copy_large)
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add dstend, dstin, n
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add srcend, src, n
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cmp n, vlen, lsl 2
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b.hi 1f
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/* Copy 2-4 vectors. */
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ptrue p0.b
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ld1b z0.b, p0/z, [src, 0, mul vl]
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ld1b z1.b, p0/z, [src, 1, mul vl]
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ld1b z2.b, p0/z, [srcend, -2, mul vl]
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ld1b z3.b, p0/z, [srcend, -1, mul vl]
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st1b z0.b, p0, [dstin, 0, mul vl]
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st1b z1.b, p0, [dstin, 1, mul vl]
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st1b z2.b, p0, [dstend, -2, mul vl]
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st1b z3.b, p0, [dstend, -1, mul vl]
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ret
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.p2align 4
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/* Copy 4-8 vectors. */
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1: ptrue p0.b
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ld1b z0.b, p0/z, [src, 0, mul vl]
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ld1b z1.b, p0/z, [src, 1, mul vl]
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ld1b z2.b, p0/z, [src, 2, mul vl]
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ld1b z3.b, p0/z, [src, 3, mul vl]
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ld1b z4.b, p0/z, [srcend, -4, mul vl]
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ld1b z5.b, p0/z, [srcend, -3, mul vl]
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ld1b z6.b, p0/z, [srcend, -2, mul vl]
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ld1b z7.b, p0/z, [srcend, -1, mul vl]
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st1b z0.b, p0, [dstin, 0, mul vl]
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st1b z1.b, p0, [dstin, 1, mul vl]
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st1b z2.b, p0, [dstin, 2, mul vl]
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st1b z3.b, p0, [dstin, 3, mul vl]
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st1b z4.b, p0, [dstend, -4, mul vl]
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st1b z5.b, p0, [dstend, -3, mul vl]
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st1b z6.b, p0, [dstend, -2, mul vl]
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st1b z7.b, p0, [dstend, -1, mul vl]
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ret
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.p2align 4
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/* At least 8 vectors - always align to vector length for
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higher and consistent write performance. */
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L(copy_large):
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sub tmp, vlen, 1
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and tmp, dstin, tmp
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sub tmp, vlen, tmp
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whilelo p1.b, xzr, tmp
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ld1b z1.b, p1/z, [src]
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st1b z1.b, p1, [dstin]
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add dst, dstin, tmp
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add src, src, tmp
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sub n, n, tmp
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ptrue p0.b
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lsl vlen8, vlen, 3
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subs n, n, vlen8
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b.ls 3f
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ld1b_unroll8
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add src, src, vlen8
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subs n, n, vlen8
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b.ls 2f
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.p2align 4
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/* 8x unrolled and software pipelined loop. */
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1: stld1b_unroll8
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add dst, dst, vlen8
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add src, src, vlen8
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subs n, n, vlen8
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b.hi 1b
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2: st1b_unroll8
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add dst, dst, vlen8
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3: add n, n, vlen8
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/* Move last 0-8 vectors. */
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L(last_bytes):
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cmp n, vlen, lsl 1
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b.hi 1f
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whilelo p0.b, xzr, n
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whilelo p1.b, vlen, n
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ld1b z0.b, p0/z, [src, 0, mul vl]
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ld1b z1.b, p1/z, [src, 1, mul vl]
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st1b z0.b, p0, [dst, 0, mul vl]
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st1b z1.b, p1, [dst, 1, mul vl]
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ret
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.p2align 4
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1: add srcend, src, n
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add dstend, dst, n
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ld1b z0.b, p0/z, [src, 0, mul vl]
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ld1b z1.b, p0/z, [src, 1, mul vl]
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ld1b z2.b, p0/z, [srcend, -2, mul vl]
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ld1b z3.b, p0/z, [srcend, -1, mul vl]
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cmp n, vlen, lsl 2
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b.hi 1f
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st1b z0.b, p0, [dst, 0, mul vl]
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st1b z1.b, p0, [dst, 1, mul vl]
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st1b z2.b, p0, [dstend, -2, mul vl]
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st1b z3.b, p0, [dstend, -1, mul vl]
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ret
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1: ld1b z4.b, p0/z, [src, 2, mul vl]
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ld1b z5.b, p0/z, [src, 3, mul vl]
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ld1b z6.b, p0/z, [srcend, -4, mul vl]
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ld1b z7.b, p0/z, [srcend, -3, mul vl]
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st1b z0.b, p0, [dst, 0, mul vl]
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st1b z1.b, p0, [dst, 1, mul vl]
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st1b z4.b, p0, [dst, 2, mul vl]
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st1b z5.b, p0, [dst, 3, mul vl]
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st1b z6.b, p0, [dstend, -4, mul vl]
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st1b z7.b, p0, [dstend, -3, mul vl]
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st1b z2.b, p0, [dstend, -2, mul vl]
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st1b z3.b, p0, [dstend, -1, mul vl]
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ret
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END (__memcpy_a64fx)
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ENTRY_ALIGN (__memmove_a64fx, 4)
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PTR_ARG (0)
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PTR_ARG (1)
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SIZE_ARG (2)
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/* Fast case for up to 2 vectors. */
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cntb vlen
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cmp n, vlen, lsl 1
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b.hi 1f
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whilelo p0.b, xzr, n
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whilelo p1.b, vlen, n
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ld1b z0.b, p0/z, [src, 0, mul vl]
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ld1b z1.b, p1/z, [src, 1, mul vl]
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st1b z0.b, p0, [dstin, 0, mul vl]
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st1b z1.b, p1, [dstin, 1, mul vl]
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L(full_overlap):
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ret
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.p2align 4
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/* Check for overlapping moves. Return if there is a full overlap.
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Small moves up to 8 vectors use the overlap-safe copy_small code.
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Non-overlapping or overlapping moves with dst < src use memcpy.
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Overlapping moves with dst > src use a backward copy loop. */
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1: sub tmp, dstin, src
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ands tmp, tmp, 0xffffffffffffff /* Clear special tag bits. */
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b.eq L(full_overlap)
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cmp n, vlen, lsl 3
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b.ls L(copy_small)
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cmp tmp, n
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b.hs L(copy_large)
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/* Align to vector length. */
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add dst, dstin, n
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sub tmp, vlen, 1
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ands tmp, dst, tmp
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csel tmp, tmp, vlen, ne
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whilelo p1.b, xzr, tmp
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sub n, n, tmp
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ld1b z1.b, p1/z, [src, n]
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st1b z1.b, p1, [dstin, n]
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add src, src, n
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add dst, dstin, n
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ptrue p0.b
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lsl vlen8, vlen, 3
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subs n, n, vlen8
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b.ls 3f
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sub src, src, vlen8
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ld1b_unroll8
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subs n, n, vlen8
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b.ls 2f
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.p2align 4
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/* 8x unrolled and software pipelined backward copy loop. */
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1: sub src, src, vlen8
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sub dst, dst, vlen8
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stld1b_unroll8
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subs n, n, vlen8
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b.hi 1b
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2: sub dst, dst, vlen8
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st1b_unroll8
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3: add n, n, vlen8
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/* Adjust src/dst for last 0-8 vectors. */
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sub src, src, n
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mov dst, dstin
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b L(last_bytes)
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END (__memmove_a64fx)
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#endif /* HAVE_AARCH64_SVE_ASM */
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