mirror of
https://sourceware.org/git/glibc.git
synced 2024-11-23 05:20:06 +00:00
a1cb1888b7
This patches consolidates all the powerpc round{f} implementations on the generic sysdeps/powerpc/fpu/s_round{f}. The generic implementation uses either the compiler builts for ISA 2.03+ (which generates the frim instruction) or a generic implementation which uses FP only operations. The IFUNC organization for powerpc64 is also change to be enabled only for powerpc64 and not for powerpc64le (since minium ISA of 2.08 does not require the fallback generic implementation). Checked on powerpc-linux-gnu (built without --with-cpu, with --with-cpu=power4 and with --with-cpu=power5+ and --disable-multi-arch), powerpc64-linux-gnu (built without --with-cp and with --with-cpu=power5+ and --disable-multi-arch). * sysdeps/powerpc/fpu/round_to_integer.h (set_fenv_mode): Add ROUND handling. (round_mode): Add definition for ROUND. (round_to_integer_float): Likewise. * sysdeps/powerpc/fpu/s_round.c: New file. * sysdeps/powerpc/fpu/s_roundf.c: New file. * sysdeps/powerpc/powerpc32/fpu/s_round.S: Remove file. * sysdeps/powerpc/powerpc32/fpu/s_roundf.S: Likewise. * sysdep/powerpc/powepc32/power4/fpu/multiarch/s_round-power5+.S: Likewise. * sysdep/powerpc/powepc32/power4/fpu/multiarch/s_round-ppc32.S: Likewise. * sysdep/powerpc/powepc32/power4/fpu/multiarch/s_roundf-power5+.S: Likewise. * sysdep/powerpc/powepc32/power4/fpu/multiarch/s_roundf-ppc32.S: Likewise. * sysdep/powerpc/powepc32/power4/fpu/multiarch/s_round-power5+.c: New file. * sysdep/powerpc/powepc32/power4/fpu/multiarch/s_round-ppc32.c: Likewise. * sysdep/powerpc/powepc32/power4/fpu/multiarch/s_roundf-power5+.c: Likewise. * sysdep/powerpc/powepc32/power4/fpu/multiarch/s_roundf-ppc32.c: Likewise. * sysdep/powerpc/powerpc32/power5+/fpu/s_round.S: Remove file. * sysdep/powerpc/powerpc32/power5+/fpu/s_roundf.S: Likewise. * sysdep/powerpc/powerpc64/be/fpu/multiarch/Makefile (libm-sysdep_routines): Add s_round-power5+, s_round-ppc64, s_roundf-power5+, and s_roundf-ppc64. (CFLAGS-s_round-power5+.c, CFLAGS-s_roundf-power5+.c): New rule. * sysdep/powerpc/powercp64/be/fpu/multiarch/s_round-power5+.c: New file. * sysdep/powerpc/powercp64/be/fpu/multiarch/s_round-ppc64.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_round.c: Move to ... * sysdeps/powerpc/powerpc64/be/fpu/multiarch/s_round.c: ... here. * sysdep/powerpc/powercp64/be/fpu/multiarch/s_roundf-power5+.c: New file. * sysdep/powerpc/powercp64/be/fpu/multiarch/s_roundf-ppc64.c: Likewise. * sysdeps/powerpc/powerpc64/fpu/multiarch/s_roundf.c: Move to ... * sysdeps/powerpc/powerpc64/be/fpu/multiarch/s_roundf.c: ... here. * sysdeps/powerpc/powerpc64/fpu/multiarch/Makefile (libm-sysdep_routines): Remove s_round-power5+, s_round-ppc64, s_roundf-power5+, and s_roundf-ppc64. * sysdep/powerpc/powerpc64/fpu/multiarch/s_round-power5+.S: Remove file. * sysdep/powerpc/powerpc64/fpu/multiarch/s_round-ppc64.S: Likewise. * sysdep/powerpc/powerpc64/fpu/multiarch/s_roundf-power5+.S: Likewise. * sysdep/powerpc/powerpc64/fpu/multiarch/s_roundf-ppc64.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_round.S: Likewise. * sysdeps/powerpc/powerpc64/fpu/s_roundf.S: Likewise. * sysdep/powerpc/powerpc64/power5+/fpu/s_round.S: Likewise. * sysdep/powerpc/powerpc64/power5+/fpu/s_roundf.S: Likewise. Reviewed-by: Gabriel F. T. Gomes <gabriel@inconstante.eti.br>
126 lines
3.1 KiB
C
126 lines
3.1 KiB
C
/* Round to integer generic implementation.
|
|
Copyright (C) 2019 Free Software Foundation, Inc.
|
|
This file is part of the GNU C Library
|
|
|
|
The GNU C Library is free software; you can redistribute it and/or
|
|
modify it under the terms of the GNU Library General Public License as
|
|
published by the Free Software Foundation; either version 2 of the
|
|
License, or (at your option) any later version.
|
|
|
|
The GNU C Library is distributed in the hope that it will be useful,
|
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
Library General Public License for more details.
|
|
|
|
You should have received a copy of the GNU Library General Public
|
|
License along with the GNU C Library; see the file COPYING.LIB. If
|
|
not, see <http://www.gnu.org/licenses/>. */
|
|
|
|
#ifndef _ROUND_TO_INTEGER_H
|
|
#define _ROUND_TO_INTEGER_H
|
|
|
|
#include <fenv_private.h>
|
|
|
|
enum round_mode
|
|
{
|
|
CEIL,
|
|
FLOOR,
|
|
ROUND
|
|
};
|
|
|
|
static inline void
|
|
set_fenv_mode (enum round_mode mode)
|
|
{
|
|
int rmode;
|
|
switch (mode)
|
|
{
|
|
case CEIL: rmode = FE_UPWARD; break;
|
|
case FLOOR: rmode = FE_DOWNWARD; break;
|
|
case ROUND: rmode = FE_TOWARDZERO; break;
|
|
default: rmode = FE_TONEAREST; break;
|
|
}
|
|
__fesetround_inline_nocheck (rmode);
|
|
}
|
|
|
|
static inline float
|
|
round_to_integer_float (enum round_mode mode, float x)
|
|
{
|
|
/* Ensure sNaN input is converted to qNaN. */
|
|
if (__glibc_unlikely (isnan (x)))
|
|
return x + x;
|
|
|
|
if (fabs (x) > 0x1p+23)
|
|
return x;
|
|
|
|
float r = x;
|
|
|
|
/* Save current FPU rounding mode and inexact state. */
|
|
fenv_t fe = fegetenv_register ();
|
|
set_fenv_mode (mode);
|
|
if (x > 0.0)
|
|
{
|
|
/* IEEE 1003.1 round function. IEEE specifies "round to the nearest
|
|
integer value, rounding halfway cases away from zero, regardless of
|
|
the current rounding mode." However PowerPC Architecture defines
|
|
"Round to Nearest" as "Choose the best approximation. In case of a
|
|
tie, choose the one that is even (least significant bit o).".
|
|
So we can't use the PowerPC "Round to Nearest" mode. Instead we set
|
|
"Round toward Zero" mode and round by adding +-0.5 before rounding
|
|
to the integer value. */
|
|
if (mode == ROUND)
|
|
r += 0.5f;
|
|
r += 0x1p+23;
|
|
r -= 0x1p+23;
|
|
r = fabs (r);
|
|
}
|
|
else if (x < 0.0)
|
|
{
|
|
if (mode == ROUND)
|
|
r -= 0.5f;
|
|
r -= 0x1p+23;
|
|
r += 0x1p+23;
|
|
r = -fabs (r);
|
|
}
|
|
__builtin_mtfsf (0xff, fe);
|
|
|
|
return r;
|
|
}
|
|
|
|
static inline double
|
|
round_to_integer_double (enum round_mode mode, double x)
|
|
{
|
|
/* Ensure sNaN input is converted to qNaN. */
|
|
if (__glibc_unlikely (isnan (x)))
|
|
return x + x;
|
|
|
|
if (fabs (x) > 0x1p+52)
|
|
return x;
|
|
|
|
double r = x;
|
|
|
|
/* Save current FPU rounding mode and inexact state. */
|
|
fenv_t fe = fegetenv_register ();
|
|
set_fenv_mode (mode);
|
|
if (x > 0.0)
|
|
{
|
|
if (mode == ROUND)
|
|
r += 0.5;
|
|
r += 0x1p+52;
|
|
r -= 0x1p+52;
|
|
r = fabs (r);
|
|
}
|
|
else if (x < 0.0)
|
|
{
|
|
if (mode == ROUND)
|
|
r -= 0.5;
|
|
r -= 0x1p+52;
|
|
r += 0x1p+52;
|
|
r = -fabs (r);
|
|
}
|
|
__builtin_mtfsf (0xff, fe);
|
|
|
|
return r;
|
|
}
|
|
|
|
#endif
|