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I used these shell commands: ../glibc/scripts/update-copyrights $PWD/../gnulib/build-aux/update-copyright (cd ../glibc && git commit -am"[this commit message]") and then ignored the output, which consisted lines saying "FOO: warning: copyright statement not found" for each of 7061 files FOO. I then removed trailing white space from math/tgmath.h, support/tst-support-open-dev-null-range.c, and sysdeps/x86_64/multiarch/strlen-vec.S, to work around the following obscure pre-commit check failure diagnostics from Savannah. I don't know why I run into these diagnostics whereas others evidently do not. remote: *** 912-#endif remote: *** 913: remote: *** 914- remote: *** error: lines with trailing whitespace found ... remote: *** error: sysdeps/unix/sysv/linux/statx_cp.c: trailing lines
108 lines
2.5 KiB
ArmAsm
108 lines
2.5 KiB
ArmAsm
# Alpha 21064 __mpn_lshift --
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# Copyright (C) 1994-2022 Free Software Foundation, Inc.
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# This file is part of the GNU MP Library.
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# The GNU MP Library is free software; you can redistribute it and/or modify
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# it under the terms of the GNU Lesser General Public License as published by
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# the Free Software Foundation; either version 2.1 of the License, or (at your
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# option) any later version.
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# The GNU MP Library is distributed in the hope that it will be useful, but
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# WITHOUT ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU Lesser General Public
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# License for more details.
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# You should have received a copy of the GNU Lesser General Public License
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# along with the GNU MP Library. If not, see <https://www.gnu.org/licenses/>.
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# INPUT PARAMETERS
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# res_ptr r16
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# s1_ptr r17
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# size r18
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# cnt r19
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# This code runs at 4.8 cycles/limb on the 21064. With infinite unrolling,
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# it would take 4 cycles/limb. It should be possible to get down to 3
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# cycles/limb since both ldq and stq can be paired with the other used
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# instructions. But there are many restrictions in the 21064 pipeline that
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# makes it hard, if not impossible, to get down to 3 cycles/limb:
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# 1. ldq has a 3 cycle delay, srl and sll have a 2 cycle delay.
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# 2. Only aligned instruction pairs can be paired.
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# 3. The store buffer or silo might not be able to deal with the bandwidth.
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.set noreorder
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.set noat
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.text
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.align 3
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.globl __mpn_lshift
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.ent __mpn_lshift
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__mpn_lshift:
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.frame $30,0,$26,0
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s8addq $18,$17,$17 # make r17 point at end of s1
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ldq $4,-8($17) # load first limb
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subq $17,8,$17
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subq $31,$19,$7
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s8addq $18,$16,$16 # make r16 point at end of RES
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subq $18,1,$18
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and $18,4-1,$20 # number of limbs in first loop
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srl $4,$7,$0 # compute function result
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beq $20,.L0
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subq $18,$20,$18
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.align 3
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.Loop0:
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ldq $3,-8($17)
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subq $16,8,$16
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subq $17,8,$17
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subq $20,1,$20
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sll $4,$19,$5
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srl $3,$7,$6
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bis $3,$3,$4
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bis $5,$6,$8
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stq $8,0($16)
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bne $20,.Loop0
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.L0: beq $18,.Lend
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.align 3
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.Loop: ldq $3,-8($17)
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subq $16,32,$16
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subq $18,4,$18
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sll $4,$19,$5
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srl $3,$7,$6
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ldq $4,-16($17)
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sll $3,$19,$1
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bis $5,$6,$8
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stq $8,24($16)
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srl $4,$7,$2
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ldq $3,-24($17)
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sll $4,$19,$5
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bis $1,$2,$8
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stq $8,16($16)
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srl $3,$7,$6
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ldq $4,-32($17)
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sll $3,$19,$1
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bis $5,$6,$8
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stq $8,8($16)
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srl $4,$7,$2
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subq $17,32,$17
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bis $1,$2,$8
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stq $8,0($16)
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bgt $18,.Loop
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.Lend: sll $4,$19,$8
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stq $8,-8($16)
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ret $31,($26),1
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.end __mpn_lshift
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