glibc/sysdeps/aarch64/fpu/Versions
Joe Ramsay a8e3ab3074 aarch64: Add vector implementations of log2 routines
A table is also added, which is shared between AdvSIMD and SVE log2.
2023-10-23 15:00:45 +01:00

35 lines
576 B
Plaintext

libmvec {
GLIBC_2.38 {
_ZGVnN2v_cos;
_ZGVnN2v_exp;
_ZGVnN2v_log;
_ZGVnN2v_sin;
_ZGVnN4v_cosf;
_ZGVnN4v_expf;
_ZGVnN4v_logf;
_ZGVnN4v_sinf;
_ZGVsMxv_cos;
_ZGVsMxv_cosf;
_ZGVsMxv_exp;
_ZGVsMxv_expf;
_ZGVsMxv_log;
_ZGVsMxv_logf;
_ZGVsMxv_sin;
_ZGVsMxv_sinf;
}
GLIBC_2.39 {
_ZGVnN4v_exp2f;
_ZGVnN2v_exp2;
_ZGVsMxv_exp2f;
_ZGVsMxv_exp2;
_ZGVnN4v_log2f;
_ZGVnN2v_log2;
_ZGVsMxv_log2f;
_ZGVsMxv_log2;
_ZGVnN4v_tanf;
_ZGVnN2v_tan;
_ZGVsMxv_tanf;
_ZGVsMxv_tan;
}
}