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90a6ca8b28
Previously many routines used * to load from vector types stored
in the data table. This is emitted as ldr, which byte-swaps the
entire vector register, and causes bugs for big-endian when not
all lanes contain the same value. When a vector is to be used
this way, it has been replaced with an array and the load with an
explicit ld1 intrinsic, which byte-swaps only within lanes.
As well, many routines previously used non-standard GCC syntax
for vector operations such as indexing into vectors types with []
and assembling vectors using {}. This syntax should not be mixed
with ACLE, as the former does not respect endianness whereas the
latter does. Such examples have been replaced with, for instance,
vcombine_* and vgetq_lane* intrinsics. Helpers which only use the
GCC syntax, such as the v_call helpers, do not need changing as
they do not use intrinsics.
Reviewed-by: Szabolcs Nagy <szabolcs.nagy@arm.com>
112 lines
3.6 KiB
C
112 lines
3.6 KiB
C
/* Double-precision vector (Advanced SIMD) log function.
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Copyright (C) 2023-2024 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include "v_math.h"
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static const struct data
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{
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uint64x2_t min_norm;
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uint32x4_t special_bound;
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float64x2_t poly[5];
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float64x2_t ln2;
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uint64x2_t sign_exp_mask;
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} data = {
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/* Worst-case error: 1.17 + 0.5 ulp.
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Rel error: 0x1.6272e588p-56 in [ -0x1.fc1p-9 0x1.009p-8 ]. */
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.poly = { V2 (-0x1.ffffffffffff7p-2), V2 (0x1.55555555170d4p-2),
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V2 (-0x1.0000000399c27p-2), V2 (0x1.999b2e90e94cap-3),
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V2 (-0x1.554e550bd501ep-3) },
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.ln2 = V2 (0x1.62e42fefa39efp-1),
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.min_norm = V2 (0x0010000000000000),
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.special_bound = V4 (0x7fe00000), /* asuint64(inf) - min_norm. */
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.sign_exp_mask = V2 (0xfff0000000000000)
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};
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#define A(i) d->poly[i]
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#define N (1 << V_LOG_TABLE_BITS)
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#define IndexMask (N - 1)
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#define Off v_u64 (0x3fe6900900000000)
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struct entry
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{
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float64x2_t invc;
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float64x2_t logc;
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};
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static inline struct entry
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lookup (uint64x2_t i)
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{
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/* Since N is a power of 2, n % N = n & (N - 1). */
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struct entry e;
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uint64_t i0 = (vgetq_lane_u64 (i, 0) >> (52 - V_LOG_TABLE_BITS)) & IndexMask;
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uint64_t i1 = (vgetq_lane_u64 (i, 1) >> (52 - V_LOG_TABLE_BITS)) & IndexMask;
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float64x2_t e0 = vld1q_f64 (&__v_log_data.table[i0].invc);
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float64x2_t e1 = vld1q_f64 (&__v_log_data.table[i1].invc);
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e.invc = vuzp1q_f64 (e0, e1);
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e.logc = vuzp2q_f64 (e0, e1);
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return e;
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}
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static float64x2_t VPCS_ATTR NOINLINE
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special_case (float64x2_t x, float64x2_t y, float64x2_t hi, float64x2_t r2,
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uint32x2_t cmp)
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{
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return v_call_f64 (log, x, vfmaq_f64 (hi, y, r2), vmovl_u32 (cmp));
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}
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float64x2_t VPCS_ATTR V_NAME_D1 (log) (float64x2_t x)
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{
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const struct data *d = ptr_barrier (&data);
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float64x2_t z, r, r2, p, y, kd, hi;
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uint64x2_t ix, iz, tmp;
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uint32x2_t cmp;
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int64x2_t k;
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struct entry e;
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ix = vreinterpretq_u64_f64 (x);
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cmp = vcge_u32 (vsubhn_u64 (ix, d->min_norm),
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vget_low_u32 (d->special_bound));
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/* x = 2^k z; where z is in range [Off,2*Off) and exact.
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The range is split into N subintervals.
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The ith subinterval contains z and c is near its center. */
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tmp = vsubq_u64 (ix, Off);
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k = vshrq_n_s64 (vreinterpretq_s64_u64 (tmp), 52); /* arithmetic shift. */
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iz = vsubq_u64 (ix, vandq_u64 (tmp, d->sign_exp_mask));
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z = vreinterpretq_f64_u64 (iz);
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e = lookup (tmp);
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/* log(x) = log1p(z/c-1) + log(c) + k*Ln2. */
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r = vfmaq_f64 (v_f64 (-1.0), z, e.invc);
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kd = vcvtq_f64_s64 (k);
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/* hi = r + log(c) + k*Ln2. */
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hi = vfmaq_f64 (vaddq_f64 (e.logc, r), kd, d->ln2);
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/* y = r2*(A0 + r*A1 + r2*(A2 + r*A3 + r2*A4)) + hi. */
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r2 = vmulq_f64 (r, r);
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y = vfmaq_f64 (A (2), A (3), r);
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p = vfmaq_f64 (A (0), A (1), r);
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y = vfmaq_f64 (y, A (4), r2);
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y = vfmaq_f64 (p, y, r2);
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if (__glibc_unlikely (v_any_u32h (cmp)))
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return special_case (x, y, hi, r2, cmp);
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return vfmaq_f64 (hi, y, r2);
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}
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