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cf29934141
2002-05-17 David S. Miller <davem@redhat.com> * sysdeps/unix/sysv/linux/sparc/fork.S: Define _internal aliases. 2002-05-16 David S. Miller <davem@redhat.com> * sysdeps/sparc/sparc32/dl-machine.h (LOAD_PIC_REG): Define. (elf_machine_dynamic): Use it to force PIC register to be loaded. (elf_machine_load_address): Likewise. * sysdeps/sparc/sparc64/dl-machine.h: Mirror sparc32 changes. * sysdeps/sparc/sparc64/strncmp.S: When second argument pointer is unaligned, do not forget to fully initialize %g1 magic value. * sysdeps/unix/sysv/linux/sparc/sys/procfs.h: Fix 64-bit elf register definitions and provide 32-bit variants of structures during 64-bit builds. * soft-fp/op-1.h (_FP_FRAC_CLEAR_OVERP_1): Define. * soft-fp/op-2.h (_FP_FRAC_CLEAR_OVERP_2): Define. * soft-fp/op-4.h (_FP_FRAC_CLEAR_OVERP_4): Define. * soft-fp/op-common.h (_FP_PACK_CANONICAL): After rounding, if _FP_FRAC_OVERP_X is set, use _FP_FRAC_CLEAR_OVERP_X to clear it. (_FP_FROM_INT): Perform right shifts on unsigned integer type. Do not clear implicit one bit here, it must be done post-rounding. Only pad to the left using left shift if value uses less than the available fractional bits.
364 lines
11 KiB
ArmAsm
364 lines
11 KiB
ArmAsm
/* Compare no more than N characters of S1 and S2, returning less than,
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equal to or greater than zero if S1 is lexicographically less than,
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equal to or greater than S2.
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For SPARC v9.
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Copyright (C) 1997, 1999 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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Contributed by Jan Vondrak <jvon4518@ss1000.ms.mff.cuni.cz> and
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Jakub Jelinek <jj@ultra.linux.cz>.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, write to the Free
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Software Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
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02111-1307 USA. */
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#include <sysdep.h>
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#include <asm/asi.h>
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#ifndef XCC
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#define XCC xcc
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#define USE_BPR
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.register %g2, #scratch
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.register %g3, #scratch
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.register %g7, #scratch
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#endif
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/* Normally, this uses
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((xword - 0x0101010101010101) & 0x8080808080808080) test
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to find out if any byte in xword could be zero. This is fast, but
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also gives false alarm for any byte in range 0x81-0xff. It does
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not matter for correctness, as if this test tells us there could
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be some zero byte, we check it byte by byte, but if bytes with
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high bits set are common in the strings, then this will give poor
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performance. You can #define EIGHTBIT_NOT_RARE and the algorithm
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will use one tick slower, but more precise test
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((xword - 0x0101010101010101) & (~xword) & 0x8080808080808080),
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which does not give any false alarms (but if some bits are set,
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one cannot assume from it which bytes are zero and which are not).
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It is yet to be measured, what is the correct default for glibc
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in these days for an average user.
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*/
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.text
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.align 32
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ENTRY(strncmp)
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#ifdef USE_BPR
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brz,pn %o2, 4f /* CTI+IEU1 Group */
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#else
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tst %o2 /* IEU1 Group */
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be,pn %XCC, 4f /* CTI */
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#endif
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sethi %hi(0x1010101), %g1 /* IEU0 */
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andcc %o0, 7, %g0 /* IEU1 Group */
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bne,pn %icc, 9f /* CTI */
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or %g1, %lo(0x1010101), %g1 /* IEU0 */
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andcc %o1, 7, %g3 /* IEU1 Group */
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bne,pn %icc, 11f /* CTI */
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sllx %g1, 32, %g2 /* IEU0 */
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ldx [%o0], %g4 /* Load Group */
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or %g1, %g2, %g1 /* IEU0 */
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1: ldx [%o1], %o3 /* Load Group */
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sllx %g1, 7, %g2 /* IEU0 */
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add %o0, 8, %o0 /* IEU1 */
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2: subcc %o2, 8, %o2 /* IEU1 Group */
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bl,pn %XCC, 5f /* CTI */
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add %o1, 8, %o1 /* IEU0 */
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sub %g4, %g1, %g3 /* IEU0 Group */
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subcc %g4, %o3, %o4 /* IEU1 */
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#ifdef EIGHTBIT_NOT_RARE
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andn %g3, %g4, %g7 /* IEU0 Group */
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#endif
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bne,pn %xcc, 6f /* CTI */
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ldxa [%o0] ASI_PNF, %g4 /* Load Group */
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add %o0, 8, %o0 /* IEU0 */
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#ifdef EIGHTBIT_NOT_RARE
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andcc %g7, %g2, %g0 /* IEU1 */
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#else
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andcc %g3, %g2, %g0 /* IEU1 */
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#endif
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be,a,pt %xcc, 2b /* CTI */
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ldxa [%o1] ASI_PNF, %o3 /* Load Group */
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addcc %g3, %g1, %o4 /* IEU1 */
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#ifdef EIGHTBIT_NOT_RARE
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srlx %g7, 32, %g7 /* IEU0 */
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andcc %g7, %g2, %g0 /* IEU1 Group */
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#else
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srlx %g3, 32, %g3 /* IEU0 */
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andcc %g3, %g2, %g0 /* IEU1 Group */
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#endif
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be,pt %xcc, 3f /* CTI */
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srlx %o4, 56, %o5 /* IEU0 */
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andcc %o5, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 4f /* CTI */
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srlx %o4, 48, %o5 /* IEU0 */
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andcc %o5, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 4f /* CTI */
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srlx %o4, 40, %o5 /* IEU0 */
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andcc %o5, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 4f /* CTI */
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srlx %o4, 32, %o5 /* IEU0 */
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andcc %o5, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 4f /* CTI */
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3: srlx %o4, 24, %o5 /* IEU0 */
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andcc %o5, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 4f /* CTI */
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srlx %o4, 16, %o5 /* IEU0 */
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andcc %o5, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 4f /* CTI */
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srlx %o4, 8, %o5 /* IEU0 */
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andcc %o5, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 4f /* CTI */
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andcc %o4, 0xff, %g0 /* IEU1 Group */
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bne,a,pn %icc, 2b /* CTI */
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ldxa [%o1] ASI_PNF, %o3 /* Load */
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4: retl /* CTI+IEU1 Group */
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clr %o0 /* IEU0 */
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.align 16
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5: srlx %g4, 56, %o4 /* IEU0 Group */
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cmp %o2, -8 /* IEU1 */
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be,pn %XCC, 4b /* CTI */
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srlx %o3, 56, %o5 /* IEU0 Group */
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andcc %o4, 0xff, %g0 /* IEU1 */
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be,pn %xcc, 8f /* CTI */
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subcc %o4, %o5, %o4 /* IEU1 Group */
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bne,pn %xcc, 8f /* CTI */
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srlx %o3, 48, %o5 /* IEU0 */
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cmp %o2, -7 /* IEU1 Group */
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be,pn %XCC, 4b /* CTI */
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srlx %g4, 48, %o4 /* IEU0 */
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andcc %o4, 0xff, %g0 /* IEU1 Group */
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be,pn %xcc, 8f /* CTI */
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subcc %o4, %o5, %o4 /* IEU1 Group */
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bne,pn %xcc, 8f /* CTI */
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srlx %o3, 40, %o5 /* IEU0 */
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cmp %o2, -6 /* IEU1 Group */
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be,pn %XCC, 4b /* CTI */
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srlx %g4, 40, %o4 /* IEU0 */
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andcc %o4, 0xff, %g0 /* IEU1 Group */
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be,pn %xcc, 8f /* CTI */
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subcc %o4, %o5, %o4 /* IEU1 Group */
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bne,pn %xcc, 8f /* CTI */
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srlx %o3, 32, %o5 /* IEU0 */
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cmp %o2, -5 /* IEU1 Group */
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be,pn %XCC, 4b /* CTI */
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srlx %g4, 32, %o4 /* IEU0 */
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andcc %o4, 0xff, %g0 /* IEU1 Group */
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be,pn %xcc, 8f /* CTI */
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subcc %o4, %o5, %o4 /* IEU1 Group */
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bne,pn %xcc, 8f /* CTI */
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srlx %o3, 24, %o5 /* IEU0 */
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cmp %o2, -4 /* IEU1 Group */
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be,pn %XCC, 4b /* CTI */
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srlx %g4, 24, %o4 /* IEU0 */
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andcc %o4, 0xff, %g0 /* IEU1 Group */
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be,pn %xcc, 8f /* CTI */
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subcc %o4, %o5, %o4 /* IEU1 Group */
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bne,pn %xcc, 8f /* CTI */
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srlx %o3, 16, %o5 /* IEU0 */
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cmp %o2, -3 /* IEU1 Group */
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be,pn %XCC, 4b /* CTI */
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srlx %g4, 16, %o4 /* IEU0 */
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andcc %o4, 0xff, %g0 /* IEU1 Group */
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be,pn %xcc, 8f /* CTI */
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subcc %o4, %o5, %o4 /* IEU1 Group */
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bne,pn %xcc, 8f /* CTI */
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srlx %o3, 8, %o5 /* IEU0 */
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cmp %o2, -2 /* IEU1 Group */
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be,pn %XCC, 4b /* CTI */
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srlx %g4, 8, %o4 /* IEU0 */
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retl /* CTI+IEU1 Group */
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sub %o4, %o5, %o0 /* IEU0 */
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6: addcc %o3, %o4, %g4 /* IEU1 */
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7: srlx %o3, 56, %o5 /* IEU0 */
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srlx %g4, 56, %o4 /* IEU0 Group */
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andcc %o4, 0xff, %g0 /* IEU1 Group */
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be,pn %xcc, 8f /* CTI */
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subcc %o4, %o5, %o4 /* IEU1 Group */
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bne,pn %xcc, 8f /* CTI */
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srlx %o3, 48, %o5 /* IEU0 */
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srlx %g4, 48, %o4 /* IEU0 Group */
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andcc %o4, 0xff, %g0 /* IEU1 Group */
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be,pn %xcc, 8f /* CTI */
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subcc %o4, %o5, %o4 /* IEU1 Group */
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bne,pn %xcc, 8f /* CTI */
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srlx %o3, 40, %o5 /* IEU0 */
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srlx %g4, 40, %o4 /* IEU0 Group */
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andcc %o4, 0xff, %g0 /* IEU1 Group */
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be,pn %xcc, 8f /* CTI */
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subcc %o4, %o5, %o4 /* IEU1 Group */
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bne,pn %xcc, 8f /* CTI */
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srlx %o3, 32, %o5 /* IEU0 */
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srlx %g4, 32, %o4 /* IEU0 Group */
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andcc %o4, 0xff, %g0 /* IEU1 Group */
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be,pn %xcc, 8f /* CTI */
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subcc %o4, %o5, %o4 /* IEU1 Group */
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bne,pn %xcc, 8f /* CTI */
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srlx %o3, 24, %o5 /* IEU0 */
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srlx %g4, 24, %o4 /* IEU0 Group */
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andcc %o4, 0xff, %g0 /* IEU1 Group */
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be,pn %xcc, 8f /* CTI */
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subcc %o4, %o5, %o4 /* IEU1 Group */
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bne,pn %xcc, 8f /* CTI */
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srlx %o3, 16, %o5 /* IEU0 */
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srlx %g4, 16, %o4 /* IEU0 Group */
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andcc %o4, 0xff, %g0 /* IEU1 Group */
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be,pn %xcc, 8f /* CTI */
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subcc %o4, %o5, %o4 /* IEU1 Group */
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bne,pn %xcc, 8f /* CTI */
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srlx %o3, 8, %o5 /* IEU0 */
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srlx %g4, 8, %o4 /* IEU0 Group */
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andcc %o4, 0xff, %g0 /* IEU1 Group */
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be,pn %xcc, 8f /* CTI */
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subcc %o4, %o5, %o4 /* IEU1 Group */
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retl /* CTI+IEU1 Group */
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sub %g4, %o3, %o0 /* IEU0 */
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8: retl /* CTI+IEU1 Group */
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mov %o4, %o0 /* IEU0 */
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9: ldub [%o0], %g4 /* Load Group */
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add %o0, 1, %o0 /* IEU0 */
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ldub [%o1], %o3 /* Load Group */
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sllx %g1, 32, %g2 /* IEU0 */
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10: subcc %o2, 1, %o2 /* IEU1 Group */
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be,pn %XCC, 8b /* CTI */
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sub %g4, %o3, %o4 /* IEU0 */
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add %o1, 1, %o1 /* IEU0 Group */
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cmp %g4, %o3 /* IEU1 */
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bne,pn %xcc, 8b /* CTI */
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lduba [%o0] ASI_PNF, %g4 /* Load Group */
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andcc %o3, 0xff, %g0 /* IEU1 */
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be,pn %icc, 4b /* CTI */
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lduba [%o1] ASI_PNF, %o3 /* Load Group */
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andcc %o0, 7, %g0 /* IEU1 */
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bne,a,pn %icc, 10b /* CTI */
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add %o0, 1, %o0 /* IEU0 Group */
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or %g1, %g2, %g1 /* IEU1 */
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andcc %o1, 7, %g3 /* IEU1 Group */
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be,pn %icc, 1b /* CTI */
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ldxa [%o0] ASI_PNF, %g4 /* Load */
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11: sllx %g3, 3, %g5 /* IEU0 Group */
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mov 64, %g7 /* IEU1 */
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or %g1, %g2, %g1 /* IEU0 Group */
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sub %o1, %g3, %o1 /* IEU1 */
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sub %g7, %g5, %g7 /* IEU0 Group */
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ldxa [%o1] ASI_PNF, %o4 /* Load */
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sllx %g1, 7, %g2 /* IEU1 */
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add %o1, 8, %o1 /* IEU0 Group */
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/* %g1 = 0101010101010101
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%g2 = 8080808080808080
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%g3 = %o1 alignment
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%g5 = number of bits to shift left
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%g7 = number of bits to shift right */
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12: sllx %o4, %g5, %o3 /* IEU0 Group */
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ldxa [%o1] ASI_PNF, %o4 /* Load */
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add %o1, 8, %o1 /* IEU1 */
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13: ldxa [%o0] ASI_PNF, %g4 /* Load Group */
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addcc %o0, 8, %o0 /* IEU1 */
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srlx %o4, %g7, %o5 /* IEU0 */
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subcc %o2, 8, %o2 /* IEU1 Group */
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bl,pn %XCC, 5b /* CTI */
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or %o3, %o5, %o3 /* IEU0 */
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cmp %g4, %o3 /* IEU1 Group */
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bne,pn %xcc, 7b /* CTI */
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sub %g4, %g1, %o5 /* IEU0 */
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#ifdef EIGHTBIT_NOT_RARE
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andn %o5, %g4, %o5 /* IEU0 Group */
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#endif
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andcc %o5, %g2, %g0 /* IEU1 Group */
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be,pt %xcc, 12b /* CTI */
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srlx %o5, 32, %o5 /* IEU0 */
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andcc %o5, %g2, %g0 /* IEU1 Group */
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be,pt %xcc, 14f /* CTI */
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srlx %g4, 56, %o5 /* IEU0 */
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andcc %o5, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 4b /* CTI */
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srlx %g4, 48, %o5 /* IEU0 */
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andcc %o5, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 4b /* CTI */
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srlx %g4, 40, %o5 /* IEU0 */
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andcc %o5, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 4b /* CTI */
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srlx %g4, 32, %o5 /* IEU0 */
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andcc %o5, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 4b /* CTI */
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14: srlx %g4, 24, %o5 /* IEU0 */
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andcc %o5, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 4b /* CTI */
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srlx %g4, 16, %o5 /* IEU0 */
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andcc %o5, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 4b /* CTI */
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srlx %g4, 8, %o5 /* IEU0 */
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andcc %o5, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 4b /* CTI */
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andcc %g4, 0xff, %g0 /* IEU1 Group */
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be,pn %icc, 4b /* CTI */
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sllx %o4, %g5, %o3 /* IEU0 */
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ldxa [%o1] ASI_PNF, %o4 /* Load Group */
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ba,pt %xcc, 13b /* CTI */
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add %o1, 8, %o1 /* IEU0 */
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END(strncmp)
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