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5a4b6f8e4b
* Transpose table layout for improved memory access
* Use half-vector special comparisons for AdvSIMD
* Improve register use near special-case branches
- Due to the presence of a function call, return value would get
mov-d out of x0 in order to facilitate PCS. By moving the final
computation after the branch this can be avoided
Also change SVE routines to use overloaded intrinsics for readability.
86 lines
2.8 KiB
C
86 lines
2.8 KiB
C
/* Single-precision vector (Advanced SIMD) log function.
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Copyright (C) 2023 Free Software Foundation, Inc.
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This file is part of the GNU C Library.
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The GNU C Library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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The GNU C Library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with the GNU C Library; if not, see
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<https://www.gnu.org/licenses/>. */
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#include "v_math.h"
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static const struct data
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{
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uint32x4_t min_norm;
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uint16x8_t special_bound;
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float32x4_t poly[7];
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float32x4_t ln2, tiny_bound;
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uint32x4_t off, mantissa_mask;
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} data = {
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/* 3.34 ulp error. */
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.poly = { V4 (-0x1.3e737cp-3f), V4 (0x1.5a9aa2p-3f), V4 (-0x1.4f9934p-3f),
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V4 (0x1.961348p-3f), V4 (-0x1.00187cp-2f), V4 (0x1.555d7cp-2f),
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V4 (-0x1.ffffc8p-2f) },
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.ln2 = V4 (0x1.62e43p-1f),
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.tiny_bound = V4 (0x1p-126),
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.min_norm = V4 (0x00800000),
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.special_bound = V8 (0x7f00), /* asuint32(inf) - min_norm. */
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.off = V4 (0x3f2aaaab), /* 0.666667. */
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.mantissa_mask = V4 (0x007fffff)
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};
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#define P(i) d->poly[7 - i]
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static float32x4_t VPCS_ATTR NOINLINE
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special_case (float32x4_t x, float32x4_t y, float32x4_t r2, float32x4_t p,
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uint16x4_t cmp)
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{
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/* Fall back to scalar code. */
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return v_call_f32 (logf, x, vfmaq_f32 (p, y, r2), vmovl_u16 (cmp));
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}
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float32x4_t VPCS_ATTR V_NAME_F1 (log) (float32x4_t x)
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{
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const struct data *d = ptr_barrier (&data);
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float32x4_t n, p, q, r, r2, y;
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uint32x4_t u;
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uint16x4_t cmp;
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u = vreinterpretq_u32_f32 (x);
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cmp = vcge_u16 (vsubhn_u32 (u, d->min_norm),
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vget_low_u16 (d->special_bound));
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/* x = 2^n * (1+r), where 2/3 < 1+r < 4/3. */
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u = vsubq_u32 (u, d->off);
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n = vcvtq_f32_s32 (
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vshrq_n_s32 (vreinterpretq_s32_u32 (u), 23)); /* signextend. */
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u = vandq_u32 (u, d->mantissa_mask);
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u = vaddq_u32 (u, d->off);
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r = vsubq_f32 (vreinterpretq_f32_u32 (u), v_f32 (1.0f));
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/* y = log(1+r) + n*ln2. */
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r2 = vmulq_f32 (r, r);
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/* n*ln2 + r + r2*(P1 + r*P2 + r2*(P3 + r*P4 + r2*(P5 + r*P6 + r2*P7))). */
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p = vfmaq_f32 (P (5), P (6), r);
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q = vfmaq_f32 (P (3), P (4), r);
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y = vfmaq_f32 (P (1), P (2), r);
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p = vfmaq_f32 (p, P (7), r2);
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q = vfmaq_f32 (q, p, r2);
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y = vfmaq_f32 (y, q, r2);
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p = vfmaq_f32 (r, d->ln2, n);
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if (__glibc_unlikely (v_any_u16h (cmp)))
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return special_case (x, y, r2, p, cmp);
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return vfmaq_f32 (p, y, r2);
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}
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