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b6a02c3606
1. Refactor files so that all implementations are in the multiarch
directory
- Moved the implementation portion of memmove sse2 from memmove.S
to multiarch/memmove-sse2.S
- The non-multiarch file now only includes one of the
implementations in the multiarch directory based on the compiled
ISA level (only used for non-multiarch builds. Otherwise we go
through the ifunc selector).
2. Add ISA level build guards to different implementations.
- I.e memmove-avx2-unaligned-erms.S which is ISA level 3 will only
build if compiled ISA level <= 3. Otherwise there is no reason
to include it as we will always use one of the ISA level 4
implementations (memmove-evex-unaligned-erms.S).
3. Add new multiarch/rtld-memmove.S that just include the
non-multiarch memmove.S which will in turn select the best
implementation based on the compiled ISA level.
4. Refactor the ifunc selector and ifunc implementation list to use
the ISA level aware wrapper macros that allow functions below the
compiled ISA level (with a guranteed replacement) to be skipped.
Tested with and without multiarch on x86_64 for ISA levels:
{generic, x86-64-v2, x86-64-v3, x86-64-v4}
And m32 with and without multiarch.
isa raising memmove
41 lines
800 B
ArmAsm
41 lines
800 B
ArmAsm
#include <isa-level.h>
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#if ISA_SHOULD_BUILD (4)
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# define VEC_SIZE 64
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# define XMM0 xmm16
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# define XMM1 xmm17
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# define YMM0 ymm16
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# define YMM1 ymm17
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# define VEC0 zmm16
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# define VEC1 zmm17
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# define VEC2 zmm18
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# define VEC3 zmm19
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# define VEC4 zmm20
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# define VEC5 zmm21
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# define VEC6 zmm22
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# define VEC7 zmm23
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# define VEC8 zmm24
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# define VEC9 zmm25
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# define VEC10 zmm26
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# define VEC11 zmm27
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# define VEC12 zmm28
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# define VEC13 zmm29
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# define VEC14 zmm30
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# define VEC15 zmm31
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# define VEC(i) VEC##i
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# define VMOVNT vmovntdq
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# define VMOVU vmovdqu64
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# define VMOVA vmovdqa64
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# define VZEROUPPER
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# define MOV_SIZE 6
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# define SECTION(p) p##.evex512
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# ifndef MEMMOVE_SYMBOL
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# define MEMMOVE_SYMBOL(p,s) p##_avx512_##s
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# endif
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# include "memmove-vec-unaligned-erms.S"
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#endif
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